From acb6e138b2e94b0e66e9930fc31751a3b48eee98 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 25 Jan 2019 20:05:38 +0100 Subject: [PATCH] src/soc/intel/cnl/chip.h: Fix preprocessor condition Commit dc666f5 (soc/intel/cannonlake: Change in SaGv options) added a conditional preprocessor directive, but its condition was incorrect because SOC_INTEL_CANNONLAKE is selected for CNL, CFL and WHL. Thus, an explicit check for !SOC_INTEL_COFFEELAKE is required. While we are at it, clean up the comment above a bit. BUG=b:123184474 Change-Id: I8a6959bb615fb5668cbfe54339747d135bd5a005 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/31095 Reviewed-by: Shelley Chen Reviewed-by: Rizwan Qureshi Reviewed-by: Ronak Kanabar Reviewed-by: Subrata Banik Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/cannonlake/chip.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index a877ec1a90..f312c6f2ea 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -100,16 +100,16 @@ struct soc_intel_cannonlake_config { uint16_t FreqSaGvMid; /* System Agent dynamic frequency support. Only effects ULX/ULT CPUs. - * for CNL options are as following - * When enabled memory will be training at three different frequencies. + * For CNL, options are as following + * When enabled, memory will be training at three different frequencies. * 0:Disabled, 1:FixedLow, 2:FixedMid, 3:FixedHigh, 4:Enabled - * for WHL/CFL options are as following - * When enabled memory will be training at two different frequencies. + * For WHL/CFL options are as following + * When enabled, memory will be training at two different frequencies. * 0:Disabled, 1:FixedLow, 2:FixedHigh, 3:Enabled*/ enum { SaGv_Disabled, SaGv_FixedLow, -#if IS_ENABLED(CONFIG_SOC_INTEL_CANNONLAKE) +#if !IS_ENABLED(CONFIG_SOC_INTEL_COFFEELAKE) SaGv_FixedMid, #endif SaGv_FixedHigh,