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soc/intel/alderlake: Drop debug interface selection 

This patch drops FSP Debug interface selection as coreboot now decides
the UART inerface to redirect the debug msg.

BUG=none
TEST=Able to see all coreboot and FSP debug log with and without this
patch.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If8c07d7e63c5d445fdb77ac38b99217bf015e15f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
Subrata Banik 2022-06-23 17:22:51 +05:30
parent 5c4921c038
commit acd60c9eff
2 changed files with 0 additions and 12 deletions
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9
src/soc/intel/alderlake/chip.h
View File

@ -353,15 +353,6 @@ struct soc_intel_alderlake_config {
*/
uint8_t serial_io_gspi_cs_state[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX];
/* Debug interface selection */
enum {
DEBUG_INTERFACE_RAM = (1 << 0),
DEBUG_INTERFACE_UART_8250IO = (1 << 1),
DEBUG_INTERFACE_USB3 = (1 << 3),
DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag;
/* Enable Pch iSCLK */
uint8_t pch_isclk;

3
src/soc/intel/alderlake/romstage/fsp_params.c
View File

@ -177,9 +177,6 @@ static void fill_fspm_security_params(FSP_M_CONFIG *m_cfg,
static void fill_fspm_uart_params(FSP_M_CONFIG *m_cfg,
const struct soc_intel_alderlake_config *config)
{
/* UART Debug Log */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
if (CONFIG(DRIVERS_UART_8250IO))
m_cfg->PcdIsaSerialUartBase = ISA_SERIAL_BASE_ADDR_3F8;
m_cfg->SerialIoUartDebugMode = PchSerialIoSkipInit;