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The AMD Fam10 code breaks with coreboot 4.5.0. 

Potentially caused by reordering. Going back to 4.4.4 which is known working on
Fam10 until gcc or the Fam10 code is fixed.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-05-19 10:01:37 +00:00 committed by Stefan Reinauer
parent 5b0280fb14
commit ace2dc3ac1
1 changed files with 5 additions and 3 deletions
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8
util/crossgcc/buildgcc
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@ -18,8 +18,8 @@
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
#
CROSSGCC_DATE="March 29th, 2010"
CROSSGCC_VERSION="1.0"
CROSSGCC_DATE="May 18th, 2010"
CROSSGCC_VERSION="1.01"
# default settings
TARGETDIR=`pwd`/xgcc
@ -31,7 +31,9 @@ GMP_VERSION=5.0.1
MPFR_VERSION=2.4.2
MPC_VERSION=0.8.2
LIBELF_VERSION=0.8.13
GCC_VERSION=4.5.0 # enable for Link Time Optimization & Co
# GCC 4.5.0 is broken on some AMD boards:
# GCC_VERSION=4.5.0 # enable for Link Time Optimization & Co
GCC_VERSION=4.4.4
BINUTILS_VERSION=2.20.1
GDB_VERSION=7.1
W32API_VERSION=3.14