mb/google/nissa: Disable the stylus GPIO pins based on fw_config

TEST=Boot to OS on nivviks/nirwen and check that stylus GPIOs are
configured based on fw_config.

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: Ibbe9f379abe10a741642e11d4833d3a53489693a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66929
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
V Sowmya 2022-08-22 13:02:09 +05:30 committed by Felix Held
parent 323bddb1bd
commit ad0288a843
1 changed files with 13 additions and 0 deletions

View File

@ -94,6 +94,13 @@ static const struct pad_config nvme_disable_pads[] = {
PAD_NC_LOCK(GPP_E17, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_E17, NONE, LOCK_CONFIG),
}; };
static const struct pad_config stylus_disable_pads[] = {
/* F13 : SOC_PEN_DETECT_R_ODL */
PAD_NC_LOCK(GPP_F13, NONE, LOCK_CONFIG),
/* F15 : SOC_PEN_DETECT_ODL */
PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
};
void fw_config_gpio_padbased_override(struct pad_config *padbased_table) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{ {
if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
@ -133,4 +140,10 @@ void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
gpio_padbased_override(padbased_table, nvme_disable_pads, gpio_padbased_override(padbased_table, nvme_disable_pads,
ARRAY_SIZE(nvme_disable_pads)); ARRAY_SIZE(nvme_disable_pads));
} }
if (fw_config_probe(FW_CONFIG(STYLUS, STYLUS_ABSENT))) {
printk(BIOS_INFO, "Disable Stylus GPIO pins.\n");
gpio_padbased_override(padbased_table, stylus_disable_pads,
ARRAY_SIZE(stylus_disable_pads));
}
} }