diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h
index c206445e58..cf31cd7a30 100644
--- a/src/soc/amd/mendocino/chip.h
+++ b/src/soc/amd/mendocino/chip.h
@@ -164,6 +164,9 @@ struct soc_amd_mendocino_config {
 
 	uint8_t usb_phy_custom;
 	struct usb_phy_config usb_phy;
+	/* Set for PCIe optimization w/a and a double confirming on the result of PCIe Signal
+	   Integrity is highly recommended. */
+	uint8_t dxio_tx_vboost_enable;
 };
 
 #endif /* MENDOCINO_CHIP_H */
diff --git a/src/soc/amd/mendocino/fsp_m_params.c b/src/soc/amd/mendocino/fsp_m_params.c
index d6eae9a7be..8533743d51 100644
--- a/src/soc/amd/mendocino/fsp_m_params.c
+++ b/src/soc/amd/mendocino/fsp_m_params.c
@@ -169,6 +169,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 		mcfg->usb_phy_ptr = 0;
 	}
 
+	mcfg->dxio_tx_vboost_enable = config->dxio_tx_vboost_enable;
+
 	fsp_fill_pcie_ddi_descriptors(mcfg);
 	fsp_assign_ioapic_upds(mcfg);
 	mb_pre_fspm(mcfg);
diff --git a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h
index 7639ab1967..9f68101c4d 100644
--- a/src/vendorcode/amd/fsp/mendocino/FspmUpd.h
+++ b/src/vendorcode/amd/fsp/mendocino/FspmUpd.h
@@ -96,7 +96,8 @@ typedef struct __packed {
 	/** Offset 0x04D7**/	uint8_t                     UnusedUpdSpace1;
 	/* usb_phy_ptr is actually struct usb_phy_config *, but that won't work for 64bit coreboot */
 	/** Offset 0x04D8**/	uint32_t                    usb_phy_ptr;
-	/** Offset 0x04DC**/	uint8_t                     UnusedUpdSpace2[292];
+	/** Offset 0x04DC**/	uint8_t                     dxio_tx_vboost_enable;
+	/** Offset 0x04DD**/	uint8_t                     UnusedUpdSpace2[291];
 	/** Offset 0x0600**/	uint16_t                    UpdTerminator;
 } FSP_M_CONFIG;