mb/google/fizz: add variant chipset display init

The Endeavour variant does not have a DisplayPort input so there's no
need to wait for it.

BUG=b:147830399
BRANCH=none
TEST=boot endeavour; check coreboot logs

Signed-off-by: Jeff Chase <jnchase@google.com>
Change-Id: I30c7c47f19a61ce66c6c923864d80870d2761859
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
This commit is contained in:
Jeff Chase 2020-06-04 17:24:59 -04:00 committed by Patrick Georgi
parent 3380faa283
commit ad1a835c69
4 changed files with 17 additions and 4 deletions

View File

@ -250,10 +250,8 @@ static void wait_for_hpd(gpio_t gpio, long timeout)
stopwatch_duration_msecs(&sw));
}
static void mainboard_chip_init(void *chip_info)
void __weak variant_chip_display_init(void)
{
const struct pad_config *pads;
size_t num;
static const long display_timeout_ms = 3000;
/* This is reconfigured back to whatever FSP-S expects by
@ -264,6 +262,14 @@ static void mainboard_chip_init(void *chip_info)
if (google_chromeec_wait_for_displayport(display_timeout_ms))
wait_for_hpd(GPIO_DP_HPD, display_timeout_ms);
}
}
static void mainboard_chip_init(void *chip_info)
{
const struct pad_config *pads;
size_t num;
variant_chip_display_init();
pads = variant_gpio_table(&num);
gpio_configure_pads(pads, num);

View File

@ -23,4 +23,6 @@ void variant_nhlt_init(struct nhlt *nhlt);
void variant_nhlt_oem_overrides(const char **oem_id, const char **oem_table_id,
uint32_t *oem_revision);
void variant_chip_display_init(void);
#endif /* __BASEBOARD_VARIANTS_H__ */

View File

@ -1,4 +1,4 @@
bootblock-y += gpio.c
ramstage-y += gpio.c
ramstage-y += nhlt.c
ramstage-y += board.c

View File

@ -12,3 +12,8 @@ void variant_nhlt_oem_overrides(const char **oem_id,
*oem_table_id = "ENDEAVOUR";
*oem_revision = 0;
}
void variant_chip_display_init(void)
{
}