- Minor bugfixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -14,6 +14,7 @@ static device_t ht_scan_get_devs(device_t *old_devices)
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first = *old_devices;
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first = *old_devices;
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last = first;
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last = first;
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while(last && last->sibling &&
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while(last && last->sibling &&
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(last->sibling->path.type == DEVICE_PATH_PCI) &&
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(last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
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(last->sibling->path.u.pci.devfn > last->path.u.pci.devfn)) {
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last = last->sibling;
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last = last->sibling;
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}
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}
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@ -475,6 +475,10 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
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{
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{
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struct device *dev = 0;
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struct device *dev = 0;
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for(; *list; list = &(*list)->sibling) {
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for(; *list; list = &(*list)->sibling) {
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if ((*list)->path.type != DEVICE_PATH_PCI) {
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printk_err("child %s not a pci device\n", dev_path(*list));
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continue;
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}
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if ((*list)->path.u.pci.devfn == devfn) {
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if ((*list)->path.u.pci.devfn == devfn) {
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/* Unlink from the list */
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/* Unlink from the list */
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dev = *list;
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dev = *list;
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@ -228,6 +228,10 @@ northbridge amd/amdk8 "mc0"
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pci 0:18.1
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pci 0:18.1
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pci 0:18.2
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pci 0:18.2
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pci 0:18.3
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pci 0:18.3
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southbridge amd/amd8151 "amd8151" link 0
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pci 0:0.0
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pci 0:1.0
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end
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southbridge amd/amd8111 "amd8111" link 0
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southbridge amd/amd8111 "amd8111" link 0
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pci 0:0.0
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pci 0:0.0
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pci 0:1.0 on
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pci 0:1.0 on
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@ -256,10 +260,6 @@ northbridge amd/amdk8 "mc0"
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register "lpt" = "{1}"
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register "lpt" = "{1}"
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end
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end
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end
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end
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southbridge amd/amd8151 "amd8151" link 1
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pci 0:0.0
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pci 0:1.0
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end
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end
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end
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cpu k8 "cpu0"
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cpu k8 "cpu0"
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@ -166,7 +166,7 @@ static unsigned int amdk8_scan_chains(device_t dev, unsigned int max)
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for(link = 0; link < dev->links; link++) {
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for(link = 0; link < dev->links; link++) {
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uint32_t link_type;
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uint32_t link_type;
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uint32_t busses, config_busses;
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uint32_t busses, config_busses;
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unsigned free_reg, config_reg;
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unsigned free_reg, config_reg, other_reg;
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dev->link[link].cap = 0x80 + (link *0x20);
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dev->link[link].cap = 0x80 + (link *0x20);
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do {
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do {
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link_type = pci_read_config32(dev, dev->link[link].cap + 0x18);
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link_type = pci_read_config32(dev, dev->link[link].cap + 0x18);
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@ -455,7 +455,13 @@ static void amdk8_set_resources(device_t dev)
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unsigned int amdk8_scan_root_bus(device_t root, unsigned int max)
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unsigned int amdk8_scan_root_bus(device_t root, unsigned int max)
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{
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{
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return pci_scan_bus(&root->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
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unsigned reg;
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max = pci_scan_bus(&root->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
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/* Unmap all of the other pci busses */
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for(reg = 0xe0; reg <= 0xec; reg += 4) {
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f1_write_config32(reg, 0);
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}
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return max;
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}
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}
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static struct device_operations northbridge_operations = {
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static struct device_operations northbridge_operations = {
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@ -100,4 +100,4 @@ romimage "fallback"
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# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
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# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
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end
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end
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buildrom ROM_SIZE "fallback"
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buildrom ./luxbios.rom ROM_SIZE "fallback"
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