libpayload/apic: Register a spurious interrupt vector
We should have a spurious interrupt vector just incase we get one. The handler doesn't need to do anything. BUG=b:116777191 TEST=Booted depthcharge on grunt and inspected the register. I can't generate a spurious interrupt, so I can't validate that the handler gets called. Change-Id: I9e49e617f4375eb5eb00d0715c1902f77e2bf284 Signed-off-by: Raul E Rangel <rrangel@chromium.org> Reviewed-on: https://review.coreboot.org/28880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -42,7 +42,6 @@
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#define XAPIC_ENABLED_BIT (1 << 11)
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#define XAPIC_ENABLED_BIT (1 << 11)
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#define X2APIC_ENABLED_BIT (1 << 10)
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#define X2APIC_ENABLED_BIT (1 << 10)
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#define APIC_MASKED_BIT (1 << 16)
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#define APIC_MASKED_BIT (1 << 16)
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#define APIC_SW_ENABLED_BIT (1 << 8)
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#define APIC_ID 0x020
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#define APIC_ID 0x020
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#define APIC_ID_SHIFT 24
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#define APIC_ID_SHIFT 24
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@ -54,6 +53,9 @@
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#define APIC_TASK_PRIORITY_MASK 0xFFUL
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#define APIC_TASK_PRIORITY_MASK 0xFFUL
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#define APIC_EOI 0x0B0
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#define APIC_EOI 0x0B0
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#define APIC_SPURIOUS 0x0F0
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#define APIC_SPURIOUS 0x0F0
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#define APIC_SW_ENABLED_BIT (1 << 8)
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#define APIC_SPURIOUS_VECTOR_MASK 0xFFUL
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#define APIC_SPURIOUS 0x0F0
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#define APIC_LVT_TIMER 0x320
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#define APIC_LVT_TIMER 0x320
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#define APIC_TIMER_INIT_COUNT 0x380
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#define APIC_TIMER_INIT_COUNT 0x380
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#define APIC_TIMER_CUR_COUNT 0x390
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#define APIC_TIMER_CUR_COUNT 0x390
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@ -63,7 +65,8 @@
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#define APIC_LVT_SIZE 0x010
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#define APIC_LVT_SIZE 0x010
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#define APIC_TIMER_VECTOR 0x20
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#define APIC_TIMER_VECTOR 0x20UL
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#define APIC_SPURIOUS_VECTOR 0xFFUL
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static uint32_t apic_bar;
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static uint32_t apic_bar;
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static int _apic_initialized;
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static int _apic_initialized;
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@ -143,6 +146,8 @@ static void timer_interrupt_handler(u8 vector)
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timer_waiting = 0;
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timer_waiting = 0;
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}
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}
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static void suprious_interrupt_handler(u8 vector) {}
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void apic_eoi(uint8_t vector)
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void apic_eoi(uint8_t vector)
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{
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{
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die_if(!apic_bar, "APIC is not initialized");
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die_if(!apic_bar, "APIC is not initialized");
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@ -255,6 +260,17 @@ static void apic_sw_enable(void)
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apic_write32(APIC_SPURIOUS, reg);
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apic_write32(APIC_SPURIOUS, reg);
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}
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}
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static void apic_setup_spurious(void)
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{
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uint32_t reg = apic_read32(APIC_SPURIOUS);
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reg &= ~APIC_SPURIOUS_VECTOR_MASK;
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reg |= APIC_SPURIOUS_VECTOR;
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apic_write32(APIC_SPURIOUS, reg);
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}
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void apic_init(void)
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void apic_init(void)
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{
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{
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uint64_t apic_bar_reg;
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uint64_t apic_bar_reg;
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@ -274,12 +290,15 @@ void apic_init(void)
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apic_reset_all_lvts();
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apic_reset_all_lvts();
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apic_set_task_priority(0);
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apic_set_task_priority(0);
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apic_setup_spurious();
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apic_sw_enable();
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apic_sw_enable();
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apic_init_timer();
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apic_init_timer();
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set_interrupt_handler(APIC_TIMER_VECTOR, &timer_interrupt_handler);
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set_interrupt_handler(APIC_TIMER_VECTOR, &timer_interrupt_handler);
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set_interrupt_handler(APIC_SPURIOUS_VECTOR,
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&suprious_interrupt_handler);
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_apic_initialized = 1;
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_apic_initialized = 1;
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