soc/amd/common/block/gpio_banks: move GPIO MUX access functions
Move those two functions near the top of the file to have all functions that do the hardware accesses in one place. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: If787e6e1d124a932beafd73e5ce7d0ce4869e800 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -31,6 +31,17 @@ static inline void gpio_write32(gpio_t gpio_num, uint32_t value)
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write32(gpio_ctrl_ptr(gpio_num), value);
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}
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static uint8_t get_gpio_mux(gpio_t gpio)
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{
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return iomux_read8(gpio);
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}
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static void set_gpio_mux(gpio_t gpio, uint8_t function)
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{
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iomux_write8(gpio, function & AMD_GPIO_MUX_MASK);
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get_gpio_mux(gpio); /* Flush posted write */
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}
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static int get_gpio_gevent(gpio_t gpio, const struct soc_amd_event *table,
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size_t items)
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{
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@ -176,17 +187,6 @@ uint16_t gpio_acpi_pin(gpio_t gpio)
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return gpio;
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}
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static uint8_t get_gpio_mux(gpio_t gpio)
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{
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return iomux_read8(gpio);
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}
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static void set_gpio_mux(gpio_t gpio, uint8_t function)
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{
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iomux_write8(gpio, function & AMD_GPIO_MUX_MASK);
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get_gpio_mux(gpio); /* Flush posted write */
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}
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void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save)
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{
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save->mux_value = get_gpio_mux(gpio);
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