soc/intel/tigerlake: Avoid NULL pointer dereference
Coverity detects pointer dev as FORWARD_NULL. Add sanity check for dev to prevent NULL pointer dereference. BUG=CID 1353148 TEST=Built and boot up to kernel. Change-Id: Ic0ad1ec79c950a3c17feccdde4f87f4a107fe8c0 Signed-off-by: John Zhao <john.zhao@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39260 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -158,9 +158,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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/* Enable xDCI controller if enabled in devicetree and allowed */
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dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
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if (!dev || !xdci_can_enable())
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dev->enabled = 0;
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params->XdciEnable = dev->enabled;
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if (dev) {
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if (!xdci_can_enable())
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dev->enabled = 0;
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params->XdciEnable = dev->enabled;
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} else {
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params->XdciEnable = 0;
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}
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/* Provide correct UART number for FSP debug logs */
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params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;
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@ -115,9 +115,13 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
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/* Enable xDCI controller if enabled in devicetree and allowed */
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dev = pcidev_on_root(PCH_DEV_SLOT_XHCI, 1);
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if (!xdci_can_enable())
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dev->enabled = 0;
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params->XdciEnable = dev->enabled;
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if (dev) {
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if (!xdci_can_enable())
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dev->enabled = 0;
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params->XdciEnable = dev->enabled;
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} else {
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params->XdciEnable = 0;
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}
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/* PCH UART selection for FSP Debug */
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params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;
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