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mb/google/brya/var/taeko: Disable PCH USB2 phy power gating for taeko 

The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for taeko board. Please refer Intel doc#723158 for
more information.

BUG=b:241965786
TEST=Verify on taeko/tarlo boards.

Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: I03042906d5bea9b9010016adb98fbe68e2dc92f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Joey Peng 2022-08-10 09:04:26 +08:00 committed by Tim Wawrzynczak
parent 8610dd5022
commit ad6b27e9ef
1 changed files with 4 additions and 0 deletions
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src/mainboard/google/brya/variants/taeko/overridetree.cb
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@ -44,6 +44,10 @@ fw_config
end end
end end
chip soc/intel/alderlake chip soc/intel/alderlake
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "usb2_phy_sus_pg_disable" = "1"
# Acoustic settings # Acoustic settings
register "acoustic_noise_mitigation" = "1" register "acoustic_noise_mitigation" = "1"
register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8" register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"