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sb/intel/lynxpoint/acpi/gpio.asl: Convert to ASL 2.0 

Change-Id: I37d6cf75ee5a5cb2ff92c89178cd4469dc059403
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50329
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes HAOUAS 2021-02-05 20:15:16 +01:00 committed by Angel Pons
parent 7b78cde554
commit ad6f6d6bf1
1 changed files with 8 additions and 7 deletions
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15
src/southbridge/intel/lynxpoint/acpi/gpio.asl
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@ -50,17 +50,18 @@ Device (GPIO)
Method (GWAK, 1, Serialized)
{
// Local0 = GPIO Base Address
Store (GPBS & ~1, Local0)
Local0 = GPBS & ~1
// Local1 = BANK, Local2 = OFFSET
Divide (Arg0, 32, Local2, Local1)
Local2 = Arg0 % 32
Local1 = Arg0 / 32
//
// Set OWNER to ACPI
//
// Local3 = GPIOBASE + GPIO_OWN(BANK)
Store (Local0 + Local1 * 4, Local3)
Local3 = Local0 + Local1 * 4
// GPIO_OWN(BANK)
OperationRegion (IOWN, SystemIO, Local3, 4)
@ -69,14 +70,14 @@ Device (GPIO)
}
// GPIO_OWN[GPIO] = 0 (ACPI)
Store (GOWN & ~(1 << Local2), GOWN)
GOWN &= ~(1 << Local2)
//
// Set ROUTE to SCI
//
// Local3 = GPIOBASE + GPIO_ROUTE(BANK)
Store (Local0 + 0x30 + Local1 * 4, Local3)
Local3 = Local0 + 0x30 + Local1 * 4
// GPIO_ROUTE(BANK)
OperationRegion (IROU, SystemIO, Local3, 4)
@ -85,14 +86,14 @@ Device (GPIO)
}
// GPIO_ROUTE[GPIO] = 0 (SCI)
Store (GROU & ~(1 << Local2), GROU)
GROU &= ~(1 << Local2)
//
// Set GPnCONFIG to GPIO|INPUT|INVERT
//
// Local3 = GPIOBASE + GPnCONFIG0(GPIO)
Store (Local0 + 0x100 + Arg0 * 8, Local3)
Local3 = Local0 + 0x100 + Arg0 * 8
// GPnCONFIG(GPIO)
OperationRegion (GPNC, SystemIO, Local3, 8)