usbdebug: Make the EHCI debug console work in the bootblock

Currently this needlessly initializes the hardware in the both the
romstage and the bootblock, but it works.

Build option is renamed to USBDEBUG_IN_PRE_RAM to reflect the
use better, related support files can be built to pre-ram stages
regardless of usbdebug being enabled or not.

Tested on Google/peppy (adapted to C_ENVIRONMENT_BOOTBLOCK).

Change-Id: Ib77f2fc7f3d8fa524405601bae15cce9f76ffc6f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/drivers/usb/Kconfig

@@ -32,7 +32,7 @@ config USBDEBUG
 
 if USBDEBUG
 
-config USBDEBUG_IN_ROMSTAGE
+config USBDEBUG_IN_PRE_RAM
 	bool "Enable early (pre-RAM) usbdebug"
 	default y
 	help

src/drivers/usb/Makefile.inc

@@ -1,4 +1,5 @@
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c pci_ehci.c console.c gadget.c
+bootblock-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c
-postcar-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c console.c
+romstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c
+postcar-$(CONFIG_USBDEBUG) += ehci_debug.c console.c
 
 ramstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c

src/drivers/usb/ehci_debug.c

@@ -683,7 +683,7 @@ static void migrate_ehci_debug(int is_recovery)
 		return;
 	}
 
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) {
+	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) {
 		/* Use state in CBMEM. */
 		dbg_info_cbmem = cbmem_find(CBMEM_ID_EHCI_DEBUG);
 		if (dbg_info_cbmem)
@@ -722,12 +722,13 @@ void usbdebug_init(void)
 	 * CBMEM_INIT_HOOKs for postcar and ramstage as we recover state
 	 * from CBMEM.
 	 */
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_ROMSTAGE)
+	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)
+	    && (ENV_ROMSTAGE || ENV_BOOTBLOCK))
 		usbdebug_hw_init(false);
 
 	/* USB console init is done early in ramstage if it was
 	 * not done in romstage, this does not require CBMEM.
 	 */
-	if (!IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE) && ENV_RAMSTAGE)
+	if (!IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM) && ENV_RAMSTAGE)
 		usbdebug_hw_init(false);
 }

src/include/console/usb.h

@@ -29,8 +29,9 @@ unsigned char usb_rx_byte(int idx);
 int usb_can_rx_byte(int idx);
 
 #define __CONSOLE_USB_ENABLE__	(IS_ENABLED(CONFIG_CONSOLE_USB) && \
-	((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) || \
+	((ENV_BOOTBLOCK && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) || \
-	 (ENV_POSTCAR && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) || \
+	 (ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) || \
+	 (ENV_POSTCAR && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) || \
 	 ENV_RAMSTAGE))
 
 #define USB_PIPE_FOR_CONSOLE 0
@@ -51,7 +52,7 @@ static inline void __usb_tx_flush(void)	{}
 
 /*  */
 #if 0 && IS_ENABLED(CONFIG_GDB_STUB) && \
-	((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE)) \
+	((ENV_ROMSTAGE && IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM)) \
 	 || ENV_RAMSTAGE)
 static inline void __gdb_hw_init(void)	{ usbdebug_init(); }
 static inline void __gdb_tx_byte(u8 data)

src/northbridge/intel/sandybridge/raminit_mrc.c

@@ -239,7 +239,7 @@ void sdram_initialize(struct pei_data *pei_data)
 	}
 
 	/* mrc.bin reconfigures USB, so reinit it to have debug */
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
 		usbdebug_hw_init(true);
 
 	/* For reference print the System Agent version

src/soc/amd/stoneyridge/Makefile.inc

@@ -42,6 +42,7 @@ bootblock-y += BiosCallOuts.c
 bootblock-y += bootblock/bootblock.c
 bootblock-y += gpio.c
 bootblock-y += i2c.c
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 bootblock-y += monotonic_timer.c
 bootblock-y += pmutil.c
 bootblock-y += reset.c
@@ -55,7 +56,7 @@ bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
 romstage-y += BiosCallOuts.c
 romstage-y += i2c.c
 romstage-y += romstage.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 romstage-y += gpio.c
 romstage-y += monotonic_timer.c
 romstage-y += pmutil.c

src/soc/intel/broadwell/Makefile.inc

@@ -61,7 +61,8 @@ ramstage-y += systemagent.c
 ramstage-y += tsc_freq.c
 romstage-y += tsc_freq.c
 smm-y      += tsc_freq.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
+romstage-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-y += ehci.c
 ramstage-y += xhci.c

src/soc/intel/fsp_baytrail/romstage/romstage.c

@@ -227,7 +227,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
 		__func__, (u32) status, (u32) hob_list_ptr);
 
 	/* FSP reconfigures USB, so reinit it to have debug */
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
 		usbdebug_hw_init(true);
 
 	printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);

src/soc/intel/fsp_broadwell_de/romstage/romstage.c

@@ -103,7 +103,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr)
 		__func__, (u32) status, (u32) hob_list_ptr);
 
 	/* FSP reconfigures USB, so reinit it to have debug */
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
 		usbdebug_hw_init(true);
 
 	printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);

src/southbridge/amd/agesa/hudson/Makefile.inc

@@ -16,7 +16,9 @@ ramstage-y += sd.c
 
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 ramstage-y += reset.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 romstage-y += early_setup.c
 

src/southbridge/amd/cimx/sb800/Makefile.inc

@@ -34,7 +34,8 @@ postcar-y += ramtop.c
 romstage-y += ramtop.c
 ramstage-y += ramtop.c
 
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c
+bootblock-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
 
 ramstage-y   += smbus.c

src/southbridge/amd/pi/hudson/Makefile.inc

@@ -28,8 +28,10 @@
 #
 #*****************************************************************************
 
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+
 romstage-y += early_setup.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 romstage-$(CONFIG_HUDSON_IMC_FWM) += imc.c
 romstage-y += smbus.c
 romstage-y += smbus_spd.c

src/southbridge/amd/sb700/Makefile.inc

@@ -13,7 +13,9 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 romstage-y += reset.c
 ramstage-y += reset.c
 ramstage-y += spi.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 
 romstage-y += early_setup.c

src/southbridge/amd/sb800/Makefile.inc

@@ -11,7 +11,9 @@ ramstage-y += pci.c
 ramstage-y += pcie.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 ramstage-y += reset.c
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 
 romstage-y += ramtop.c

src/southbridge/intel/common/Makefile.inc

@@ -29,7 +29,8 @@ ramstage-y += pmbase.c
 postcar-y += pmbase.c
 smm-y += pmbase.c
 
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
+romstage-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
 
 romstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO) += gpio.c

src/southbridge/intel/fsp_rangeley/Makefile.inc

@@ -27,6 +27,7 @@ ramstage-y += acpi.c
 romstage-y += early_usb.c early_smbus.c gpio.c early_spi.c early_init.c
 romstage-y += romstage.c
 
+bootblock-$(CONFIG_USBDEBUG) += usb_debug.c
 romstage-$(CONFIG_USBDEBUG) += usb_debug.c
 ramstage-$(CONFIG_USBDEBUG) += usb_debug.c
 

src/southbridge/intel/fsp_rangeley/romstage.c

@@ -101,7 +101,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
 		__func__, (u32) status, (u32) hob_list_ptr);
 
 	/* FSP reconfigures USB, so reinit it to have debug */
-	if (IS_ENABLED(CONFIG_USBDEBUG_IN_ROMSTAGE))
+	if (IS_ENABLED(CONFIG_USBDEBUG_IN_PRE_RAM))
 		usbdebug_hw_init(true);
 
 	printk(BIOS_DEBUG, "FSP Status: 0x%0x\n", (u32)status);

src/southbridge/nvidia/ck804/Makefile.inc

@@ -17,7 +17,8 @@ ramstage-y += reset.c
 
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 romstage-y += early_smbus.c
 

src/southbridge/nvidia/mcp55/Makefile.inc

@@ -17,7 +17,8 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 
 ramstage-y += reset.c
 
-romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
+bootblock-$(CONFIG_USBDEBUG) += enable_usbdebug.c
+romstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
 romstage-y += early_smbus.c
 romstage-y += early_ctrl.c