mb/google/corsola: move USB3 HUB reset funtion to bootblock

To save the S3 power, USB3_HUB_RST_L is externally pulled up to a weak
resistor, so we have to reset the hub as early as possible.
Otherwise the USB3 hub may be not usable. Therefore, move USB3 HUB
reset function to bootblock.

BUG=b:210065282
TEST=build pass

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I92feb2316302fda32478b24c014bcd380d0ac55d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60088
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Rex-BC Chen 2021-12-13 19:43:17 +08:00 committed by Hung-Te Lin
parent 0fd072d3f2
commit add2e93050
3 changed files with 8 additions and 6 deletions

View File

@ -2,10 +2,16 @@
#include <bootblock_common.h>
#include <device/mmio.h>
#include <gpio.h>
#include <soc/spi.h>
#include "gpio.h"
static void usb3_hub_reset(void)
{
gpio_output(GPIO_USB3_HUB_RST_L, 1);
}
void bootblock_mainboard_init(void)
{
mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
@ -13,4 +19,5 @@ void bootblock_mainboard_init(void)
mtk_snfc_init(SPI_NOR_GPIO_SET1);
setup_chromeos_gpios();
gpio_eint_configure(GPIO_GSC_AP_INT_ODL, IRQ_TYPE_EDGE_RISING);
usb3_hub_reset();
}

View File

@ -23,6 +23,7 @@
#define GPIO_RESET GPIO(PERIPHERAL_EN0)
#define GPIO_XHCI_DONE GPIO(PERIPHERAL_EN1)
#define GPIO_USB3_HUB_RST_L GPIO(PERIPHERAL_EN2)
#define GPIO_EN_SPK GPIO(PERIPHERAL_EN3)
#define GPIO_BEEP_ON GPIO(PERIPHERAL_EN4)

View File

@ -10,13 +10,7 @@
#include <soc/gpio.h>
#include <soc/usb.h>
static void usb3_hub_reset(void)
{
gpio_output(GPIO(PERIPHERAL_EN2), 1);
}
void mtk_usb_prepare(void)
{
usb3_hub_reset();
gpio_output(GPIO(USB_DRVVBUS_P1), 1);
}