superio/fintek/f71863fg: Avoid .c includes
Following the same reasoning as commit
d304331
superio/fintek/f81865f: Avoid .c includes
Clean up the early_serial #include directives in mainboard/romstage code.
Change-Id: I863c16634873224c17e43100271e9b91419724d0
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5435
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
parent
fbdc3ef7d9
commit
ade70a0482
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@ -42,7 +42,7 @@
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#include "northbridge/amd/amdfam10/reset_test.c"
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#include "northbridge/amd/amdfam10/reset_test.c"
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#include <console/loglevel.h>
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#include <console/loglevel.h>
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#include "cpu/x86/bist.h"
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#include "cpu/x86/bist.h"
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#include "superio/fintek/f71863fg/early_serial.c"
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#include <superio/fintek/f71863fg/f71863fg.h>
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#include <cpu/amd/mtrr.h>
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#include <cpu/amd/mtrr.h>
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#include "northbridge/amd/amdfam10/setup_resource_map.c"
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#include "northbridge/amd/amdfam10/setup_resource_map.c"
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#include "southbridge/amd/rs780/early_setup.c"
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#include "southbridge/amd/rs780/early_setup.c"
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@ -18,5 +18,5 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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##
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romstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += early_serial.c
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ramstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.c
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ramstage-$(CONFIG_SUPERIO_FINTEK_F71863FG) += superio.c
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@ -29,4 +29,4 @@ struct superio_fintek_f71863fg_config {
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struct pc_keyboard keyboard;
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struct pc_keyboard keyboard;
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};
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};
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#endif
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#endif /* SUPERIO_FINTEK_F71863FG_CHIP_H */
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@ -21,6 +21,7 @@
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/* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */
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/* Pre-RAM driver for the Fintek F71863FG Super I/O chip. */
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#include <arch/io.h>
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#include <arch/io.h>
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#include <device/pnp.h>
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#include "f71863fg.h"
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#include "f71863fg.h"
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static void pnp_enter_conf_state(device_t dev)
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static void pnp_enter_conf_state(device_t dev)
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@ -36,7 +37,7 @@ static void pnp_exit_conf_state(device_t dev)
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outb(0xaa, port);
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outb(0xaa, port);
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}
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}
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static void f71863fg_enable_serial(device_t dev, u16 iobase)
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void f71863fg_enable_serial(device_t dev, u16 iobase)
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{
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{
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pnp_enter_conf_state(dev);
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pnp_enter_conf_state(dev);
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pnp_set_logical_device(dev);
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pnp_set_logical_device(dev);
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@ -33,4 +33,6 @@
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#define F71863FG_SPI 0x08 /* SPI */
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#define F71863FG_SPI 0x08 /* SPI */
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#define F71863FG_PME 0x0a /* Power Management Events (PME) and ACPI */
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#define F71863FG_PME 0x0a /* Power Management Events (PME) and ACPI */
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#endif
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void f71863fg_enable_serial(device_t dev, u16 iobase);
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#endif /* SUPERIO_FINTEK_F71863FG_F71863FG_H */
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