From ade7800ec62ffed51efaaf46dad6cd2cf1148725 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Fri, 14 Oct 2016 17:57:08 -0400 Subject: [PATCH] northbridge/amd: Update 00670F00 asl for reduced hardware Remove the language associated with the Carrizo Gfx PCIe bridges. Original-Signed-off-by: Marshall Dawson (cherry picked from commit cc32b09b0f0137c11d82f35274ca33e013f73748) Change-Id: I8b67a646f98667d500fcee5da8389c10483488da Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/17144 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- .../amd/pi/00670F00/acpi/northbridge.asl | 36 +------------------ 1 file changed, 1 insertion(+), 35 deletions(-) diff --git a/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl b/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl index cde5182123..e5cf34f07d 100644 --- a/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl +++ b/src/northbridge/amd/pi/00670F00/acpi/northbridge.asl @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2013 Sage Electronic Engineering, LLC + * Copyright (C) 2016 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -94,38 +95,3 @@ Device(PBR8) { Return (PS8) /* PIC Mode */ } /* end _PRT */ } /* end PBR8 */ - -/* GFX 1 */ -Device(PBR9) { - Name(_ADR, 0x00030002) -} /* end PBR8 */ - -/* GFX 2 */ -Device(PBRA) { - Name(_ADR, 0x00030003) - Name(_PRW, Package() {0x18, 4}) - Method(_PRT,0) { - If(PMOD){ Return(APSA) } /* APIC mode */ - Return (PSA) /* PIC Mode */ - } /* end _PRT */ -} /* end PBR8 */ - -/* GFX 3 */ -Device(PBRB) { - Name(_ADR, 0x00030004) - Name(_PRW, Package() {0x18, 4}) - Method(_PRT,0) { - If(PMOD){ Return(APSB) } /* APIC mode */ - Return (PSB) /* PIC Mode */ - } /* end _PRT */ -} /* end PBR8 */ - -/* GFX 4 */ -Device(PBRC) { - Name(_ADR, 0x00030005) - Name(_PRW, Package() {0x18, 4}) - Method(_PRT,0) { - If(PMOD){ Return(APSC) } /* APIC mode */ - Return (PSC) /* PIC Mode */ - } /* end _PRT */ -} /* end PBR8 */