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arch/x86/car.ld: Fix up blob reserved regions 

Drop duplicated assignment that rewound `.` back, and broke platforms
using MRC.bin and DCACHE_RAM_MRC_VAR_SIZE.

Tested on out-of-tree Acer E5-573 (Broadwell), fixes booting.
Also tested on Asrock B85M Pro4 (Haswell), also fixes booting.

Change-Id: I3f0153f776c07acf7cf92808b677b118c60507c3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49909
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2021-01-26 00:30:25 +01:00
parent aaa4a0d39e
commit aded1d7fd0
1 changed files with 0 additions and 2 deletions
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src/arch/x86/car.ld
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@ -94,8 +94,6 @@
.car.mrc_var . (NOLOAD) : { .car.mrc_var . (NOLOAD) : {
. += CONFIG_DCACHE_RAM_MRC_VAR_SIZE; . += CONFIG_DCACHE_RAM_MRC_VAR_SIZE;
} }
. = _car_region_end;
.car.fspt_reserved . (NOLOAD) : { .car.fspt_reserved . (NOLOAD) : {
. += CONFIG_FSP_T_RESERVED_SIZE; . += CONFIG_FSP_T_RESERVED_SIZE;
} }