vendorcode/amd/opensil: Add initial setup and API calls
- First a console is set up for opensil. - After that a region in CBMEM is reserved and passed to opensil which will use it as a buffer for input/output information. - Finally opensil is called and the return value handled. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I4833a5a86034a13e6be102a6b68c3bb54108bc9a Reviewed-on: https://review.coreboot.org/c/coreboot/+/76515 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -89,6 +89,7 @@
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#define CBMEM_ID_AMD_MP2 0x5f32504d
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#define CBMEM_ID_AMD_MP2 0x5f32504d
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#define CBMEM_ID_CSE_INFO 0x4553435F
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#define CBMEM_ID_CSE_INFO 0x4553435F
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#define CBMEM_ID_CSE_BP_INFO 0x42455343
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#define CBMEM_ID_CSE_BP_INFO 0x42455343
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#define CBMEM_ID_AMD_OPENSIL 0x4153494C
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#define CBMEM_ID_TO_NAME_TABLE \
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#define CBMEM_ID_TO_NAME_TABLE \
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{ CBMEM_ID_ACPI, "ACPI " }, \
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{ CBMEM_ID_ACPI, "ACPI " }, \
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@ -170,5 +171,6 @@
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{ CBMEM_ID_AMD_STB, "AMD STB"},\
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{ CBMEM_ID_AMD_STB, "AMD STB"},\
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{ CBMEM_ID_AMD_MP2, "AMD MP2 BUFFER"},\
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{ CBMEM_ID_AMD_MP2, "AMD MP2 BUFFER"},\
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{ CBMEM_ID_CSE_INFO, "CSE SPECIFIC INFO"},\
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{ CBMEM_ID_CSE_INFO, "CSE SPECIFIC INFO"},\
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{ CBMEM_ID_CSE_BP_INFO, "CSE BP INFO"}
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{ CBMEM_ID_CSE_BP_INFO, "CSE BP INFO"}, \
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{ CBMEM_ID_AMD_OPENSIL, "OPENSIL DATA"}
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#endif /* _CBMEM_ID_H_ */
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#endif /* _CBMEM_ID_H_ */
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@ -7,6 +7,7 @@ romstage-y += opensil_console.c
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romstage-y += romstage.c
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romstage-y += romstage.c
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ramstage-y += opensil_console.c
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ramstage-y += opensil_console.c
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ramstage-y += ramstage.c
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$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas
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$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/opensil_console.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas
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$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/romstage.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas
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$(obj)/romstage/vendorcode/amd/opensil/genoa_poc/romstage.o: CFLAGS_romstage += -D_MSC_EXTENSIONS=0 -DHAS_STRING_H=1 -Wno-unknown-pragmas
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@ -0,0 +1,89 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <amdblocks/reset.h>
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#include <bootstate.h>
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#include <cbmem.h>
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#include <xSIM-api.h>
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#include "opensil_console.h"
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static void SIL_STATUS_report(const char *function, const int status)
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{
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const int log_level = status == SilPass ? BIOS_DEBUG : BIOS_ERR;
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const char *error_string = "Unkown error";
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const struct error_string_entry {
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SIL_STATUS status;
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const char *string;
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} errors[] = {
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{SilPass, "SilPass"},
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{SilUnsupportedHardware, "SilUnsupportedHardware"},
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{SilUnsupported, "SilUnsupported"},
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{SilInvalidParameter, "SilInvalidParameter"},
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{SilAborted, "SilAborted"},
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{SilOutOfResources, "SilOutOfResources"},
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{SilNotFound, "SilNotFound"},
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{SilOutOfBounds, "SilOutOfBounds"},
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{SilDeviceError, "SilDeviceError"},
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{SilResetRequestColdImm, "SilResetRequestColdImm"},
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{SilResetRequestColdDef, "SilResetRequestColdDef"},
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{SilResetRequestWarmImm, "SilResetRequestWarmImm"},
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{SilResetRequestWarmDef, "SilResetRequestWarmDef"},
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};
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int i;
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for (i = 0; i < ARRAY_SIZE(errors); i++) {
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if (errors[i].status == status)
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error_string = errors[i].string;
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}
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printk(log_level, "%s returned %d (%s)\n", function, status, error_string);
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}
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static void setup_opensil(void *unused)
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{
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const SIL_STATUS debug_ret = SilDebugSetup(HostDebugService);
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SIL_STATUS_report("SilDebugSetup", debug_ret);
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const size_t mem_req = xSimQueryMemoryRequirements();
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void *buf = cbmem_add(CBMEM_ID_AMD_OPENSIL, mem_req);
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assert(buf);
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/* We run all openSIL timepoints in the same stage so using TP1 as argument is fine. */
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const SIL_STATUS assign_mem_ret = xSimAssignMemoryTp1(buf, mem_req);
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SIL_STATUS_report("xSimAssignMemory", assign_mem_ret);
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, setup_opensil, NULL);
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static void opensil_entry(void *timepoint)
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{
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SIL_STATUS ret;
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SIL_TIMEPOINT tp = (uintptr_t)timepoint;
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switch (tp) {
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case SIL_TP1:
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ret = InitializeSiTp1();
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break;
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case SIL_TP2:
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ret = InitializeSiTp2();
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break;
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case SIL_TP3:
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ret = InitializeSiTp3();
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break;
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default:
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printk(BIOS_ERR, "Unknown opensil timepoint\n");
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return;
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}
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char opensil_function[16];
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snprintf(opensil_function, sizeof(opensil_function), "InitializeSiTp%d", tp);
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SIL_STATUS_report(opensil_function, ret);
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if (ret == SilResetRequestColdImm || ret == SilResetRequestColdDef) {
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printk(BIOS_INFO, "openSil requested a cold reset");
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do_cold_reset();
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} else if (ret == SilResetRequestWarmImm || ret == SilResetRequestWarmDef) {
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printk(BIOS_INFO, "openSil requested a warm reset");
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do_warm_reset();
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}
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}
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/* TODO: look into calling these functions from some SoC device operations instead of using
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* BOOT_STATE_INIT_ENTRY */
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_EXIT, opensil_entry, (void *)SIL_TP1);
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/* TODO add other timepoints later. Are they NOOP? */
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