mb/google/dedede: Create driblee variant

Create the driblee variant of the waddledee reference board by
copying the template files to a new directory named for the variant.

(Auto-generated by create_coreboot_variant.sh version 4.5.0.)

BUG=b:191732473
BRANCH=None
TEST=util/abuild/abuild -p none -t google/dedede -x -a
make sure the build includes GOOGLE_DRIBLEE

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I1ad9a4e0cf7999337b55d62d5cc94e4f6c2e98f3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/mainboard/google/dedede/Kconfig

@@ -114,6 +114,7 @@ config MAINBOARD_PART_NUMBER
 	default "Cappy2" if BOARD_GOOGLE_CAPPY2
 	default "Bugzzy" if BOARD_GOOGLE_BUGZZY
 	default "Corori" if BOARD_GOOGLE_CORORI
+	default "Driblee" if BOARD_GOOGLE_DRIBLEE
 
 config MAX_CPUS
 	int
@@ -153,6 +154,7 @@ config VARIANT_DIR
 	default "cappy2" if BOARD_GOOGLE_CAPPY2
 	default "bugzzy" if BOARD_GOOGLE_BUGZZY
 	default "corori" if BOARD_GOOGLE_CORORI
+	default "driblee" if BOARD_GOOGLE_DRIBLEE
 
 endif #BOARD_GOOGLE_BASEBOARD_DEDEDE
 

src/mainboard/google/dedede/Kconfig.name

@@ -171,3 +171,8 @@ config BOARD_GOOGLE_CORORI
 	bool "-> Corori"
 	select BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
 	select BASEBOARD_DEDEDE_LAPTOP
+
+config BOARD_GOOGLE_DRIBLEE
+	bool "-> Driblee"
+	select BOARD_GOOGLE_BASEBOARD_DEDEDE_TPM2
+	select BASEBOARD_DEDEDE_LAPTOP

src/mainboard/google/dedede/variants/driblee/include/variant/ec.h

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef MAINBOARD_EC_H
+#define MAINBOARD_EC_H
+
+#include <baseboard/ec.h>
+
+#endif

src/mainboard/google/dedede/variants/driblee/include/variant/gpio.h

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef MAINBOARD_GPIO_H
+#define MAINBOARD_GPIO_H
+
+#include <baseboard/gpio.h>
+
+#endif /* MAINBOARD_GPIO_H */

src/mainboard/google/dedede/variants/driblee/memory/Makefile.inc

@@ -0,0 +1,5 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+## This is an auto-generated file. Do not edit!!
+## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
+
+SPD_SOURCES = placeholder.spd.hex

src/mainboard/google/dedede/variants/driblee/memory/dram_id.generated.txt

@@ -0,0 +1 @@
+DRAM Part Name                 ID to assign

src/mainboard/google/dedede/variants/driblee/memory/mem_parts_used.txt

@@ -0,0 +1,11 @@
+# This is a CSV file containing a list of memory parts used by this variant.
+# One part per line with an optional fixed ID in column 2.
+# Only include a fixed ID if it is required for legacy reasons!
+# Generated IDs are dependent on the order of parts in this file,
+# so new parts must always be added at the end of the file!
+#
+# Generate an updated Makefile.inc and dram_id.generated.txt by running the
+# gen_part_id tool from util/spd_tools/{ddr4,lp4x}.
+# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.
+
+# Part Name

src/mainboard/google/dedede/variants/driblee/overridetree.cb

@@ -0,0 +1,43 @@
+chip soc/intel/jasperlake
+
+	# Intel Common SoC Config
+	#+-------------------+---------------------------+
+	#| Field             |  Value                    |
+	#+-------------------+---------------------------+
+	#| I2C0              | Trackpad                  |
+	#| I2C1              | Digitizer                 |
+	#| I2C2              | Touchscreen               |
+	#| I2C3              | Camera                    |
+	#| I2C4              | Audio                     |
+	#+-------------------+---------------------------+
+	register "common_soc_config" = "{
+		.i2c[0] = {
+			.speed = I2C_SPEED_FAST,
+		},
+		.i2c[1] = {
+			.speed = I2C_SPEED_FAST,
+		},
+		.i2c[2] = {
+			.speed = I2C_SPEED_FAST,
+		},
+		.i2c[3] = {
+			.speed = I2C_SPEED_FAST,
+		},
+		.i2c[4] = {
+			.speed = I2C_SPEED_FAST,
+		},
+	}"
+
+	register "SerialIoGSpiMode[PchSerialIoIndexGSPI0]" = "PchSerialIoDisabled" # Disable GSPI0
+	register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0"
+
+	device domain 0 on
+		device pci 15.0 on end
+		device pci 1e.2 off end # GSPI 0
+		device pci 1f.0 on
+			chip drivers/pc80/tpm
+				device pnp 0c31.0 on end # Discrete TPM
+			end # chip drivers/pc80/tpm
+		end # PCH eSPI
+	end
+end