Eliminate do_div().
This eliminates the use of do_div() in favor of using libgcc functions. This was tested by building and booting on Google Snow (ARMv7) and Qemu (x86). printk()s which use division in vtxprintf() look good. Change-Id: Icad001d84a3c05bfbf77098f3d644816280b4a4d Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2606 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
parent
31c5e07a04
commit
ae0e8d3613
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@ -124,7 +124,7 @@ endif
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$(objgenerated)/coreboot_ram.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME)
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@printf " CC $(subst $(obj)/,,$(@))\n"
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ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
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$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --wrap __do_div64 --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
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$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
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else
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$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
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endif
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@ -1,233 +0,0 @@
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/* taken from linux 2.6.31.14 */
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#ifndef __ASM_ARM_DIV64
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#define __ASM_ARM_DIV64
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//#include <asm/system.h>
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//#include <linux/types.h>
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// FIXME
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#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
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#define __LINUX_ARM_ARCH__ 7
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/*
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* The semantics of do_div() are:
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*
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* uint32_t do_div(uint64_t *n, uint32_t base)
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* {
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* uint32_t remainder = *n % base;
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* *n = *n / base;
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* return remainder;
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* }
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*
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* In other words, a 64-bit dividend with a 32-bit divisor producing
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* a 64-bit result and a 32-bit remainder. To accomplish this optimally
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* we call a special __do_div64 helper with completely non standard
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* calling convention for arguments and results (beware).
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*/
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#ifdef __ARMEB__
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#define __xh "r0"
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#define __xl "r1"
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#else
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#define __xl "r0"
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#define __xh "r1"
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#endif
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#define __do_div_asm(n, base) \
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({ \
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register unsigned int __base asm("r4") = base; \
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register unsigned long long __n asm("r0") = n; \
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register unsigned long long __res asm("r2"); \
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register unsigned int __rem asm(__xh); \
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asm( __asmeq("%0", __xh) \
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__asmeq("%1", "r2") \
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__asmeq("%2", "r0") \
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__asmeq("%3", "r4") \
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"bl __do_div64" \
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: "=r" (__rem), "=r" (__res) \
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: "r" (__n), "r" (__base) \
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: "ip", "lr", "cc"); \
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n = __res; \
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__rem; \
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})
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#if __GNUC__ < 4
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/*
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* gcc versions earlier than 4.0 are simply too problematic for the
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* optimized implementation below. First there is gcc PR 15089 that
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* tend to trig on more complex constructs, spurious .global __udivsi3
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* are inserted even if none of those symbols are referenced in the
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* generated code, and those gcc versions are not able to do constant
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* propagation on long long values anyway.
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*/
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#define do_div(n, base) __do_div_asm(n, base)
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#elif __GNUC__ >= 4
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//#include <asm/bug.h>
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/*
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* If the divisor happens to be constant, we determine the appropriate
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* inverse at compile time to turn the division into a few inline
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* multiplications instead which is much faster. And yet only if compiling
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* for ARMv4 or higher (we need umull/umlal) and if the gcc version is
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* sufficiently recent to perform proper long long constant propagation.
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* (It is unfortunate that gcc doesn't perform all this internally.)
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*/
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#define do_div(n, base) \
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({ \
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unsigned int __r, __b = (base); \
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if (!__builtin_constant_p(__b) || __b == 0 || \
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(__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \
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/* non-constant divisor (or zero): slow path */ \
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__r = __do_div_asm(n, __b); \
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} else if ((__b & (__b - 1)) == 0) { \
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/* Trivial: __b is constant and a power of 2 */ \
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/* gcc does the right thing with this code. */ \
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__r = n; \
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__r &= (__b - 1); \
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n /= __b; \
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} else { \
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/* Multiply by inverse of __b: n/b = n*(p/b)/p */ \
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/* We rely on the fact that most of this code gets */ \
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/* optimized away at compile time due to constant */ \
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/* propagation and only a couple inline assembly */ \
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/* instructions should remain. Better avoid any */ \
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/* code construct that might prevent that. */ \
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unsigned long long __res, __x, __t, __m, __n = n; \
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unsigned int __c, __p, __z = 0; \
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/* preserve low part of n for reminder computation */ \
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__r = __n; \
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/* determine number of bits to represent __b */ \
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__p = 1 << __div64_fls(__b); \
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/* compute __m = ((__p << 64) + __b - 1) / __b */ \
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__m = (~0ULL / __b) * __p; \
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__m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \
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/* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \
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__x = ~0ULL / __b * __b - 1; \
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__res = (__m & 0xffffffff) * (__x & 0xffffffff); \
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__res >>= 32; \
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__res += (__m & 0xffffffff) * (__x >> 32); \
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__t = __res; \
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__res += (__x & 0xffffffff) * (__m >> 32); \
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__t = (__res < __t) ? (1ULL << 32) : 0; \
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__res = (__res >> 32) + __t; \
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__res += (__m >> 32) * (__x >> 32); \
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__res /= __p; \
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/* Now sanitize and optimize what we've got. */ \
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if (~0ULL % (__b / (__b & -__b)) == 0) { \
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/* those cases can be simplified with: */ \
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__n /= (__b & -__b); \
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__m = ~0ULL / (__b / (__b & -__b)); \
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__p = 1; \
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__c = 1; \
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} else if (__res != __x / __b) { \
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/* We can't get away without a correction */ \
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/* to compensate for bit truncation errors. */ \
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/* To avoid it we'd need an additional bit */ \
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/* to represent __m which would overflow it. */ \
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/* Instead we do m=p/b and n/b=(n*m+m)/p. */ \
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__c = 1; \
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/* Compute __m = (__p << 64) / __b */ \
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__m = (~0ULL / __b) * __p; \
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__m += ((~0ULL % __b + 1) * __p) / __b; \
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} else { \
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/* Reduce __m/__p, and try to clear bit 31 */ \
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/* of __m when possible otherwise that'll */ \
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/* need extra overflow handling later. */ \
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unsigned int __bits = -(__m & -__m); \
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__bits |= __m >> 32; \
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__bits = (~__bits) << 1; \
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/* If __bits == 0 then setting bit 31 is */ \
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/* unavoidable. Simply apply the maximum */ \
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/* possible reduction in that case. */ \
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/* Otherwise the MSB of __bits indicates the */ \
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/* best reduction we should apply. */ \
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if (!__bits) { \
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__p /= (__m & -__m); \
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__m /= (__m & -__m); \
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} else { \
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__p >>= __div64_fls(__bits); \
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__m >>= __div64_fls(__bits); \
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} \
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/* No correction needed. */ \
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__c = 0; \
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} \
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/* Now we have a combination of 2 conditions: */ \
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/* 1) whether or not we need a correction (__c), and */ \
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/* 2) whether or not there might be an overflow in */ \
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/* the cross product (__m & ((1<<63) | (1<<31))) */ \
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/* Select the best insn combination to perform the */ \
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/* actual __m * __n / (__p << 64) operation. */ \
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if (!__c) { \
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asm ( "umull %Q0, %R0, %1, %Q2\n\t" \
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"mov %Q0, #0" \
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: "=&r" (__res) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \
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__res = __m; \
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asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \
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"mov %Q0, #0" \
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: "+&r" (__res) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} else { \
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asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \
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"cmn %Q0, %Q1\n\t" \
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"adcs %R0, %R0, %R1\n\t" \
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"adc %Q0, %3, #0" \
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: "=&r" (__res) \
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: "r" (__m), "r" (__n), "r" (__z) \
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: "cc" ); \
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} \
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if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \
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asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \
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"umlal %R0, %Q0, %Q1, %R2\n\t" \
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"mov %R0, #0\n\t" \
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"umlal %Q0, %R0, %R1, %R2" \
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: "+&r" (__res) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} else { \
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asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \
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"umlal %R0, %1, %Q2, %R3\n\t" \
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"mov %R0, #0\n\t" \
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"adds %Q0, %1, %Q0\n\t" \
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"adc %R0, %R0, #0\n\t" \
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"umlal %Q0, %R0, %R2, %R3" \
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: "+&r" (__res), "+&r" (__z) \
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: "r" (__m), "r" (__n) \
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: "cc" ); \
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} \
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__res /= __p; \
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/* The reminder can be computed with 32-bit regs */ \
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/* only, and gcc is good at that. */ \
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{ \
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unsigned int __res0 = __res; \
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unsigned int __b0 = __b; \
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__r -= __res0 * __b0; \
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} \
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/* BUG_ON(__r >= __b || __res * __b + __r != n); */ \
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n = __res; \
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} \
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__r; \
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})
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/* our own fls implementation to make sure constant propagation is fine */
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#define __div64_fls(bits) \
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({ \
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unsigned int __left = (bits), __nr = 0; \
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if (__left & 0xffff0000) __nr += 16, __left >>= 16; \
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if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \
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if (__left & 0x000000f0) __nr += 4, __left >>= 4; \
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if (__left & 0x0000000c) __nr += 2, __left >>= 2; \
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if (__left & 0x00000002) __nr += 1; \
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__nr; \
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})
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#endif
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#endif
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@ -6,12 +6,10 @@ bootblock-y += cache-cp15.c
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romstage-y += cache_v7.c
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romstage-y += cache-cp15.c
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romstage-y += div0.c
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romstage-y += div64.S
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romstage-y += syslib.c
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romstage-$(CONFIG_EARLY_CONSOLE) += early_console.c
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ramstage-y += div0.c
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ramstage-y += div64.S
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#ramstage-y += interrupts.c
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#ramstage-y += memcpy.S
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#ramstage-y += memset.S
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@ -1,208 +0,0 @@
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/*
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* linux/arch/arm/lib/div64.S
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*
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* Optimized computation of 64-bit dividend / 32-bit divisor
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*
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* Author: Nicolas Pitre
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* Created: Oct 5, 2003
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* Copyright: Monta Vista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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// FIXME
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//#include <linux/linkage.h>
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#define __LINUX_ARM_ARCH__ 7
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#ifdef __ARMEB__
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#define xh r0
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#define xl r1
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#define yh r2
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#define yl r3
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#else
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#define xl r0
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#define xh r1
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#define yl r2
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#define yh r3
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#endif
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/*
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* __do_div64: perform a division with 64-bit dividend and 32-bit divisor.
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*
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* Note: Calling convention is totally non standard for optimal code.
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* This is meant to be used by do_div() from include/asm/div64.h only.
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*
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* Input parameters:
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* xh-xl = dividend (clobbered)
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* r4 = divisor (preserved)
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*
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* Output values:
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* yh-yl = result
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* xh = remainder
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*
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* Clobbered regs: xl, ip
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*/
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.globl __do_div64;
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.align 4,0x90
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__do_div64:
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@ Test for easy paths first.
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subs ip, r4, #1
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bls 9f @ divisor is 0 or 1
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tst ip, r4
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beq 8f @ divisor is power of 2
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@ See if we need to handle upper 32-bit result.
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cmp xh, r4
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mov yh, #0
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blo 3f
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@ Align divisor with upper part of dividend.
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@ The aligned divisor is stored in yl preserving the original.
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@ The bit position is stored in ip.
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#if __LINUX_ARM_ARCH__ >= 5
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clz yl, r4
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clz ip, xh
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sub yl, yl, ip
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mov ip, #1
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mov ip, ip, lsl yl
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mov yl, r4, lsl yl
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#else
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mov yl, r4
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mov ip, #1
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1: cmp yl, #0x80000000
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cmpcc yl, xh
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movcc yl, yl, lsl #1
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movcc ip, ip, lsl #1
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bcc 1b
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#endif
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@ The division loop for needed upper bit positions.
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@ Break out early if dividend reaches 0.
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2: cmp xh, yl
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orrcs yh, yh, ip
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subcss xh, xh, yl
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movnes ip, ip, lsr #1
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mov yl, yl, lsr #1
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bne 2b
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@ See if we need to handle lower 32-bit result.
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3: cmp xh, #0
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mov yl, #0
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cmpeq xl, r4
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movlo xh, xl
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movlo pc, lr
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@ The division loop for lower bit positions.
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@ Here we shift remainer bits leftwards rather than moving the
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@ divisor for comparisons, considering the carry-out bit as well.
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mov ip, #0x80000000
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4: movs xl, xl, lsl #1
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adcs xh, xh, xh
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beq 6f
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cmpcc xh, r4
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5: orrcs yl, yl, ip
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subcs xh, xh, r4
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movs ip, ip, lsr #1
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bne 4b
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mov pc, lr
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@ The top part of remainder became zero. If carry is set
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@ (the 33th bit) this is a false positive so resume the loop.
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@ Otherwise, if lower part is also null then we are done.
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6: bcs 5b
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cmp xl, #0
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moveq pc, lr
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@ We still have remainer bits in the low part. Bring them up.
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#if __LINUX_ARM_ARCH__ >= 5
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clz xh, xl @ we know xh is zero here so...
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add xh, xh, #1
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mov xl, xl, lsl xh
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mov ip, ip, lsr xh
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#else
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7: movs xl, xl, lsl #1
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mov ip, ip, lsr #1
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bcc 7b
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#endif
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@ Current remainder is now 1. It is worthless to compare with
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@ divisor at this point since divisor can not be smaller than 3 here.
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@ If possible, branch for another shift in the division loop.
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@ If no bit position left then we are done.
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movs ip, ip, lsr #1
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mov xh, #1
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bne 4b
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mov pc, lr
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8: @ Division by a power of 2: determine what that divisor order is
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@ then simply shift values around
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#if __LINUX_ARM_ARCH__ >= 5
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clz ip, r4
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rsb ip, ip, #31
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#else
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mov yl, r4
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cmp r4, #(1 << 16)
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mov ip, #0
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movhs yl, yl, lsr #16
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movhs ip, #16
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cmp yl, #(1 << 8)
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movhs yl, yl, lsr #8
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addhs ip, ip, #8
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|
||||
cmp yl, #(1 << 4)
|
||||
movhs yl, yl, lsr #4
|
||||
addhs ip, ip, #4
|
||||
|
||||
cmp yl, #(1 << 2)
|
||||
addhi ip, ip, #3
|
||||
addls ip, ip, yl, lsr #1
|
||||
|
||||
#endif
|
||||
|
||||
mov yh, xh, lsr ip
|
||||
mov yl, xl, lsr ip
|
||||
rsb ip, ip, #32
|
||||
orr yl, yl, xh, lsl ip
|
||||
mov xh, xl, lsl ip
|
||||
mov xh, xh, lsr ip
|
||||
mov pc, lr
|
||||
|
||||
@ eq -> division by 1: obvious enough...
|
||||
9: moveq yl, xl
|
||||
moveq yh, xh
|
||||
moveq xh, #0
|
||||
moveq pc, lr
|
||||
|
||||
@ Division by 0:
|
||||
str lr, [sp, #-8]!
|
||||
bl __div0
|
||||
|
||||
@ as wrong as it could be...
|
||||
mov yl, #0
|
||||
mov yh, #0
|
||||
mov xh, #0
|
||||
ldr pc, [sp], #8
|
||||
|
||||
@.type __do_div64, @function;
|
||||
@.size __do_div64, .-__do_div64,
|
||||
|
|
@ -354,9 +354,9 @@ endif
|
|||
$(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld
|
||||
@printf " LINK $(subst $(obj)/,,$(@))\n"
|
||||
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
|
||||
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_null.ld
|
||||
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld
|
||||
else
|
||||
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld $(romstage-objs)
|
||||
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
|
||||
endif
|
||||
$(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \
|
||||
echo "Forbidden global variables in romstage:"; \
|
||||
|
@ -366,9 +366,9 @@ endif
|
|||
$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld
|
||||
@printf " LINK $(subst $(obj)/,,$(@))\n"
|
||||
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
|
||||
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage_xip.ld
|
||||
$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld
|
||||
else
|
||||
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld $(romstage-objs)
|
||||
$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
|
||||
endif
|
||||
|
||||
$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions
|
||||
|
|
|
@ -1,30 +0,0 @@
|
|||
#ifndef __I386_DIV64
|
||||
#define __I386_DIV64
|
||||
|
||||
/*
|
||||
* do_div() is NOT a C function. It wants to return
|
||||
* two values (the quotient and the remainder), but
|
||||
* since that doesn't work very well in C, what it
|
||||
* does is:
|
||||
*
|
||||
* - modifies the 64-bit dividend _in_place_
|
||||
* - returns the 32-bit remainder
|
||||
*
|
||||
* This ends up being the most efficient "calling
|
||||
* convention" on x86.
|
||||
*/
|
||||
#define do_div(n,base) ({ \
|
||||
unsigned long __upper, __low, __high, __mod, __base; \
|
||||
__base = (base); \
|
||||
asm("":"=a" (__low), "=d" (__high):"A" (n)); \
|
||||
__upper = __high; \
|
||||
if (__high) { \
|
||||
__upper = __high % (__base); \
|
||||
__high = __high / (__base); \
|
||||
} \
|
||||
asm("divl %2":"=a" (__low), "=d" (__mod):"rm" (__base), "0" (__low), "1" (__upper)); \
|
||||
asm("":"=A" (n):"a" (__low),"d" (__high)); \
|
||||
__mod; \
|
||||
})
|
||||
|
||||
#endif
|
|
@ -5,7 +5,6 @@
|
|||
*/
|
||||
|
||||
#include <string.h>
|
||||
#include <div64.h>
|
||||
#include <console/console.h>
|
||||
#include <console/vtxprintf.h>
|
||||
|
||||
|
@ -70,20 +69,8 @@ static int number(void (*tx_byte)(unsigned char byte),
|
|||
if (num == 0)
|
||||
tmp[i++]='0';
|
||||
else while (num != 0){
|
||||
/* there are some nice optimizations in the
|
||||
* Macros-From-Hell that form the div64 code
|
||||
* *IF* you call it with a constant.
|
||||
* We're firmware, we only do bases
|
||||
* 8, 10, and 16. Let's be smart.
|
||||
* This greatly helps ARM, reduces the
|
||||
* code footprint at compile time, and does not hurt x86.
|
||||
*/
|
||||
if (base == 10)
|
||||
tmp[i++] = digits[do_div(num,10)];
|
||||
else if (base == 8)
|
||||
tmp[i++] = digits[do_div(num,8)];
|
||||
else /* sorry, you're out of choices */
|
||||
tmp[i++] = digits[do_div(num,16)];
|
||||
tmp[i++] = digits[num % base];
|
||||
num /= base;
|
||||
}
|
||||
if (i > precision)
|
||||
precision = i;
|
||||
|
|
|
@ -36,8 +36,8 @@ endif
|
|||
smm-y += smihandler.c
|
||||
smm-y += smiutil.c
|
||||
|
||||
$(obj)/cpu/x86/smm/smm.o: $$(smm-objs)
|
||||
$(CC) $(LDFLAGS) -nostdlib -r -o $@ $^
|
||||
$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME)
|
||||
$(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
|
||||
|
||||
$(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions
|
||||
$(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o
|
||||
|
|
|
@ -48,6 +48,7 @@ romstage-$(CONFIG_USBDEBUG) += usbdebug.c
|
|||
romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c cbmem.c
|
||||
romstage-y += compute_ip_checksum.c
|
||||
romstage-y += memmove.c
|
||||
romstage-$(CONFIG_ARCH_X86) += gcc.c
|
||||
|
||||
ramstage-y += hardwaremain.c
|
||||
ramstage-y += selfboot.c
|
||||
|
@ -94,6 +95,7 @@ smm-y += cbfs.c memcmp.c
|
|||
smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
|
||||
smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
|
||||
smm-$(CONFIG_USBDEBUG) += usbdebug.c
|
||||
smm-y += gcc.c
|
||||
|
||||
$(obj)/lib/version.ramstage.o : $(obj)/build.h
|
||||
|
||||
|
|
Loading…
Reference in New Issue