GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02 

The headers added are generated as per FSP v2471_02.
Previous FSP version was v2422_01.
Changes Include:
- UPDs description update in FspsUpd.h
- Adjust UPD Offset in FspmUpd.h and FspsUpd.h

BUG=b:208336249
BRANCH=None
TEST=Build and boot brya

Change-Id: I4d04652c06a1c1823d3859be209710c273a2ae8c
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Ronak Kanabar 2021-11-30 16:42:49 +05:30 committed by Nick Vaccaro
parent 8bb59ca2fa
commit ae0ea32c52
2 changed files with 8 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
View File

@ -3164,7 +3164,7 @@ typedef struct {
/** Offset 0x0AA8 - Reserved
**/
UINT8 Reserved45[104];
UINT8 Reserved45[136];
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
@ -3183,11 +3183,11 @@ typedef struct {
**/
FSP_M_CONFIG FspmConfig;
/** Offset 0x0B10
/** Offset 0x0B30
**/
UINT8 UnusedUpdSpace31[6];
UINT8 UnusedUpdSpace34[6];
/** Offset 0x0B16
/** Offset 0x0B36
**/
UINT16 UpdTerminator;
} FSPM_UPD;

9
src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
View File

@ -3380,8 +3380,7 @@ typedef struct {
UINT8 ProcHotLock;
/** Offset 0x0CF3 - Configuration for boot TDP selection
Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP
Up;0xFF : Deactivate
Deprecated. Move to premem.
**/
UINT8 ConfigTdpLevel;
@ -3869,7 +3868,7 @@ typedef struct {
/** Offset 0x0FD5 - Reserved
**/
UINT8 Reserved56[19];
UINT8 Reserved56[123];
} FSP_S_CONFIG;
/** Fsp S UPD Configuration
@ -3888,11 +3887,11 @@ typedef struct {
**/
FSP_S_CONFIG FspsConfig;
/** Offset 0x0FE8
/** Offset 0x1050
**/
UINT8 UnusedUpdSpace42[6];
/** Offset 0x0FEE
/** Offset 0x1056
**/
UINT16 UpdTerminator;
} FSPS_UPD;