soc/intel: Introduce ioapic_get_sci_pin()
According to ACPI Release 6.5 systems supporting PIC (i8259) interrupt mechanism need to report IRQ vector for the SCI_INT field. In PIC mode only IRQ0..15 are allowed hardware vectors. This change should cover section 5.2.9 to not pass SCI_INT larger than IRQ15. Section 5.2.15.5 needs follow-up work. Care should be taken that ioapic_get_sci_pin() is called after platform code has potentially changed the routing from the default. It appears touched all platforms except siemens/mc_aplX currently program SCI as IRQ9. Change-Id: I723c207f1dcbba5e6fc0452fe1dbd087fad290ee Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki
parent
ddc37d69cb
commit
ae1b2d49cf
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@ -17,6 +17,7 @@
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#include <acpi/acpi_ivrs.h>
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#include <acpi/acpigen.h>
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#include <arch/hpet.h>
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#include <arch/smp/mpspec.h>
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#include <cbfs.h>
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#include <cbmem.h>
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#include <commonlib/helpers.h>
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@ -225,6 +226,24 @@ int acpi_create_madt_ioapic_from_hw(acpi_madt_ioapic_t *ioapic, u32 addr)
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}
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#endif
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u16 acpi_sci_int(void)
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{
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#if ENV_X86
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u8 gsi, irq, flags;
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ioapic_get_sci_pin(&gsi, &irq, &flags);
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/* ACPI Release 6.5, 5.2.9 and 5.2.15.5. */
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if (!CONFIG(ACPI_HAVE_PCAT_8259))
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return gsi;
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assert(irq < 16);
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return irq;
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#else
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return 0;
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#endif
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}
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int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
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u8 bus, u8 source, u32 gsirq, u16 flags)
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{
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@ -238,6 +257,25 @@ int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
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return irqoverride->length;
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}
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int acpi_create_madt_sci_override(acpi_madt_irqoverride_t *irqoverride)
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{
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u8 gsi, irq, flags;
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ioapic_get_sci_pin(&gsi, &irq, &flags);
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if (!CONFIG(ACPI_HAVE_PCAT_8259))
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irq = gsi;
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irqoverride->type = IRQ_SOURCE_OVERRIDE; /* Interrupt source override */
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irqoverride->length = sizeof(acpi_madt_irqoverride_t);
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irqoverride->bus = MP_BUS_ISA;
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irqoverride->source = irq;
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irqoverride->gsirq = gsi;
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irqoverride->flags = flags;
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return irqoverride->length;
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}
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static int acpi_create_madt_lapic_nmi(acpi_madt_lapic_nmi_t *lapic_nmi, u8 cpu,
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u16 flags, u8 lint)
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{
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@ -22,6 +22,8 @@ void register_new_ioapic(void *ioapic_base);
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void register_new_ioapic_gsi0(void *ioapic_base);
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void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb);
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void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags);
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#endif
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#endif
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@ -1338,12 +1338,15 @@ int acpi_create_madt_ioapic(acpi_madt_ioapic_t *ioapic, u8 id, u32 addr,
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int acpi_create_madt_ioapic_from_hw(acpi_madt_ioapic_t *ioapic, u32 addr);
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int acpi_create_madt_irqoverride(acpi_madt_irqoverride_t *irqoverride,
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u8 bus, u8 source, u32 gsirq, u16 flags);
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int acpi_create_madt_sci_override(acpi_madt_irqoverride_t *irqoverride);
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unsigned long acpi_create_madt_one_lapic(unsigned long current, u32 cpu, u32 apic);
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unsigned long acpi_create_madt_lapics_with_nmis(unsigned long current);
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unsigned long acpi_create_madt_lapic_nmis(unsigned long current);
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u16 acpi_sci_int(void);
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int acpi_create_srat_lapic(acpi_srat_lapic_t *lapic, u8 node, u8 apic);
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int acpi_create_srat_x2apic(acpi_srat_x2apic_t *x2apic, u32 node, u32 apic);
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int acpi_create_srat_mem(acpi_srat_mem_t *mem, u8 node, u32 basek, u32 sizek,
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@ -10,7 +10,6 @@
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#include <cpu/x86/msr.h>
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#include <cpu/intel/turbo.h>
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#include <soc/acpi.h>
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#include <soc/iomap.h>
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#include <soc/irq.h>
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#include <soc/msr.h>
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@ -52,14 +51,21 @@ static const acpi_cstate_t cstate_map[] = {
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}
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};
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int acpi_sci_irq(void)
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static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
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{
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if (sci_irq >= 20)
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return MP_IRQ_POLARITY_LOW;
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else
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return MP_IRQ_POLARITY_HIGH;
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}
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#define ACPI_SCI_IRQ 9
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void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
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{
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u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
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int sci_irq = ACPI_SCI_IRQ;
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int scis;
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static int sci_irq;
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if (sci_irq)
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return sci_irq;
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/* Determine how SCI is routed. */
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scis = read32(actl) & SCIS_MASK;
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@ -76,13 +82,15 @@ int acpi_sci_irq(void)
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sci_irq = scis - SCIS_IRQ20 + 20;
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break;
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default:
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printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
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sci_irq = 9;
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printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
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break;
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}
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printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
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return sci_irq;
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*gsi = sci_irq;
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*irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
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*flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
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printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
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}
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static acpi_tstate_t soc_tss_table[] = {
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@ -280,33 +288,14 @@ void generate_cpu_entries(const struct device *device)
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acpigen_write_processor_cnot(pattrs->num_cpus);
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}
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static unsigned long acpi_madt_irq_overrides(unsigned long current)
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{
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int sci_irq = acpi_sci_irq();
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acpi_madt_irqoverride_t *irqovr;
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uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
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/* INT_SRC_OVR */
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irqovr = (void *)current;
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current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
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if (sci_irq >= 20)
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sci_flags |= MP_IRQ_POLARITY_LOW;
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else
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sci_flags |= MP_IRQ_POLARITY_HIGH;
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irqovr = (void *)current;
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current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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/* IOAPIC */
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current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
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current = acpi_madt_irq_overrides(current);
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/* INT_SRC_OVR */
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current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
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current += acpi_create_madt_sci_override((void *)current);
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return current;
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}
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@ -11,7 +11,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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const uint16_t pmbase = ACPI_BASE_ADDRESS;
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fadt->sci_int = acpi_sci_irq();
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fadt->sci_int = acpi_sci_int();
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if (permanent_smi_handler()) {
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fadt->smi_cmd = APM_CNT;
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@ -5,6 +5,4 @@
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#include <acpi/acpi.h>
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int acpi_sci_irq(void);
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#endif /* _BAYTRAIL_ACPI_H_ */
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@ -81,14 +81,21 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
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gnvs->cid1 = WRDD_DEFAULT_REGULATORY_DOMAIN;
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}
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int acpi_sci_irq(void)
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static u8 soc_madt_sci_irq_polarity(u8 sci_irq)
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{
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if (sci_irq >= 20)
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return MP_IRQ_POLARITY_LOW;
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else
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return MP_IRQ_POLARITY_HIGH;
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}
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#define ACPI_SCI_IRQ 9
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void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
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{
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u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL);
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int sci_irq = ACPI_SCI_IRQ;
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int scis;
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static int sci_irq;
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if (sci_irq)
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return sci_irq;
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/* Determine how SCI is routed. */
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scis = read32(actl) & SCIS_MASK;
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@ -105,13 +112,15 @@ int acpi_sci_irq(void)
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sci_irq = scis - SCIS_IRQ20 + 20;
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break;
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default:
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printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
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sci_irq = 9;
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printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
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break;
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}
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printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
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return sci_irq;
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*gsi = sci_irq;
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*irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
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*flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
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printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
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}
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static acpi_tstate_t soc_tss_table[] = {
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@ -309,33 +318,14 @@ void generate_cpu_entries(const struct device *device)
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acpigen_write_processor_cnot(pattrs->num_cpus);
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}
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static unsigned long acpi_madt_irq_overrides(unsigned long current)
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{
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int sci_irq = acpi_sci_irq();
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acpi_madt_irqoverride_t *irqovr;
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uint16_t sci_flags = MP_IRQ_TRIGGER_LEVEL;
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/* INT_SRC_OVR */
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irqovr = (void *)current;
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current += acpi_create_madt_irqoverride(irqovr, 0, 0, 2, 0);
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if (sci_irq >= 20)
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sci_flags |= MP_IRQ_POLARITY_LOW;
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else
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sci_flags |= MP_IRQ_POLARITY_HIGH;
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irqovr = (void *)current;
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current += acpi_create_madt_irqoverride(irqovr, 0, sci_irq, sci_irq, sci_flags);
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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/* IOAPIC */
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current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, IO_APIC_ADDR);
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current = acpi_madt_irq_overrides(current);
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/* INT_SRC_OVR */
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current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
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current += acpi_create_madt_sci_override((void *)current);
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return current;
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}
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@ -11,7 +11,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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const uint16_t pmbase = ACPI_BASE_ADDRESS;
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fadt->sci_int = acpi_sci_irq();
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fadt->sci_int = acpi_sci_int();
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if (permanent_smi_handler()) {
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fadt->smi_cmd = APM_CNT;
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@ -5,7 +5,6 @@
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#include <acpi/acpi.h>
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int acpi_sci_irq(void);
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void acpi_create_serialio_ssdt(acpi_header_t *ssdt);
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unsigned long southcluster_write_acpi_tables(const struct device *device,
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unsigned long current, struct acpi_rsdp *rsdp);
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@ -24,9 +24,11 @@
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#define CPUID_6_EAX_ISST (1 << 7)
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static int acpi_sci_irq(void)
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#define ACPI_SCI_IRQ 9
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void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags)
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{
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int sci_irq = 9;
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int sci_irq = ACPI_SCI_IRQ;
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uint32_t scis;
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scis = soc_read_sci_irq_select();
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@ -47,31 +49,17 @@ static int acpi_sci_irq(void)
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sci_irq = scis - SCIS_IRQ20 + 20;
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break;
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default:
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printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ9.\n");
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sci_irq = 9;
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printk(BIOS_DEBUG, "Invalid SCI route! Defaulting to IRQ%d.\n", sci_irq);
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break;
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}
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printk(BIOS_DEBUG, "SCI is IRQ%d\n", sci_irq);
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return sci_irq;
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*gsi = sci_irq;
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*irq = (sci_irq < 16) ? sci_irq : ACPI_SCI_IRQ;
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*flags = MP_IRQ_TRIGGER_LEVEL | soc_madt_sci_irq_polarity(sci_irq);
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printk(BIOS_DEBUG, "SCI is IRQ %d, GSI %d\n", *irq, *gsi);
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}
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static unsigned long acpi_madt_irq_overrides(unsigned long current)
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{
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int sci = acpi_sci_irq();
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uint16_t flags = MP_IRQ_TRIGGER_LEVEL;
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/* INT_SRC_OVR */
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current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
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flags |= soc_madt_sci_irq_polarity(sci);
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/* SCI */
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current +=
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acpi_create_madt_irqoverride((void *)current, 0, sci, sci, flags);
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return current;
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}
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static const uintptr_t default_ioapic_bases[] = { IO_APIC_ADDR };
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@ -95,14 +83,18 @@ unsigned long acpi_fill_madt(unsigned long current)
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for (int i = 0; i < ioapic_entries; i++)
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current += acpi_create_madt_ioapic_from_hw((void *)current, ioapic_table[i]);
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return acpi_madt_irq_overrides(current);
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/* INT_SRC_OVR */
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current += acpi_create_madt_irqoverride((void *)current, 0, 0, 2, 0);
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current += acpi_create_madt_sci_override((void *)current);
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return current;
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}
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void acpi_fill_fadt(acpi_fadt_t *fadt)
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{
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const uint16_t pmbase = ACPI_BASE_ADDRESS;
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fadt->sci_int = acpi_sci_irq();
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fadt->sci_int = acpi_sci_int();
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if (permanent_smi_handler()) {
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fadt->smi_cmd = APM_CNT;
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