From ae2a5228277f3c5b00c29e6f9567ced67309f064 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 16 Sep 2020 13:25:02 +0200 Subject: [PATCH] nb/intel/gm45: Introduce memmap.h Move all memory map definitions into a separate header. Tested with BUILD_TIMELESS=1, Roda RK9 remains identical. Change-Id: Idddb63069b7a0b7b4d6c7850473a71318748bb9b Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45451 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/gm45/gm45.h | 9 +-------- src/northbridge/intel/gm45/memmap.h | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 8 deletions(-) create mode 100644 src/northbridge/intel/gm45/memmap.h diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 0fec20c1f2..8be18733d1 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -170,14 +170,7 @@ enum { #define CMOS_READ_TRAINING 0x80 /* 16 bytes */ #define CMOS_WRITE_TRAINING 0x90 /* 16 bytes (could be reduced to 10 bytes) */ -#define DEFAULT_MCHBAR 0xfed14000 -#define DEFAULT_DMIBAR 0xfed18000 -#define DEFAULT_EPBAR 0xfed19000 - -#define IOMMU_BASE1 0xfed90000 -#define IOMMU_BASE2 0xfed91000 -#define IOMMU_BASE3 0xfed92000 -#define IOMMU_BASE4 0xfed93000 +#include "memmap.h" /* * D0:F0 diff --git a/src/northbridge/intel/gm45/memmap.h b/src/northbridge/intel/gm45/memmap.h new file mode 100644 index 0000000000..c0706d0442 --- /dev/null +++ b/src/northbridge/intel/gm45/memmap.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __NORTHBRIDGE_INTEL_GM45_MEMMAP_H__ +#define __NORTHBRIDGE_INTEL_GM45_MEMMAP_H__ + +#define DEFAULT_MCHBAR 0xfed14000 +#define DEFAULT_DMIBAR 0xfed18000 +#define DEFAULT_EPBAR 0xfed19000 + +#define IOMMU_BASE1 0xfed90000 +#define IOMMU_BASE2 0xfed91000 +#define IOMMU_BASE3 0xfed92000 +#define IOMMU_BASE4 0xfed93000 + +#endif /* __NORTHBRIDGE_INTEL_GM45_MEMMAP_H__ */