mb/google/octopus: Update GPIO_178 in early_gpio_table in baseboard

This change updates the configuration of GPIO_178 to be active low as
per latest revision on different octopus variants. This effectively:
1. Gets rid of early_gpio_table in different variants -- phaser, meep,
fleex, bobba.
2. Deprecates board id < 2 for bobba, board id < 1 for fleex and
phaser.
3. Adds special early_gpio_table in yorp which has GPIO_178 as an
active high signal.

BUG=b:119885949

Change-Id: I024199a8f1f96db57f8fa60c4d265789cd3a0493
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/29784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
This commit is contained in:
Furquan Shaikh 2018-11-21 14:02:59 -08:00 committed by Patrick Georgi
parent c529f5b7f2
commit ae2cf49508
7 changed files with 55 additions and 172 deletions

View File

@ -308,7 +308,7 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */
/* Enable power to wifi early in bootblock and de-assert PERST#. */
PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */
PAD_CFG_GPO(GPIO_178, 0, DEEP), /* EN_PP3300_WLAN_L */
PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */
/*

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@ -49,48 +49,3 @@ const struct pad_config *variant_override_gpio_table(size_t *num)
}
return c;
}
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = {
/* PCH_WP_OD */
PAD_CFG_GPI(GPIO_190, NONE, DEEP),
/* H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,
DISPUPD),
/* H1_SLAVE_SPI_CLK_R */
PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_CS_L_R */
PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MISO */
PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MOSI_R */
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1),
/* WLAN_PE_RST */
PAD_CFG_GPO(GPIO_164, 0, DEEP),
/*
* ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
* pull-up for proper operation. Since there is no external pull present
* on this platform, configure an internal weak pull-up.
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU),
};
const struct pad_config *variant_early_gpio_table(size_t *num)
{
/*
* This is a hack to configure EN_PP3300_WLAN based on board id. Once
* board id 0/1 is deprecated, we can get rid of this.
*/
uint32_t bid = board_id();
if (bid == UNDEFINED_STRAPPING_ID || bid < 2)
gpio_output(GPIO_178, 1);
else
gpio_output(GPIO_178, 0);
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}

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@ -86,48 +86,3 @@ const struct pad_config *variant_override_gpio_table(size_t *num)
return c;
}
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = {
/* PCH_WP_OD */
PAD_CFG_GPI(GPIO_190, NONE, DEEP),
/* H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,
DISPUPD),
/* H1_SLAVE_SPI_CLK_R */
PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_CS_L_R */
PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MISO */
PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MOSI_R */
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1),
/* WLAN_PE_RST */
PAD_CFG_GPO(GPIO_164, 0, DEEP),
/*
* ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
* pull-up for proper operation. Since there is no external pull present
* on this platform, configure an internal weak pull-up.
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU),
};
const struct pad_config *variant_early_gpio_table(size_t *num)
{
/*
* This is a hack to configure EN_PP3300_WLAN based on board id. Once
* board id 0 is deprecated, we can get rid of this.
*/
uint32_t bid = board_id();
if (bid == UNDEFINED_STRAPPING_ID || bid < 1)
gpio_output(GPIO_178, 1);
else
gpio_output(GPIO_178, 0);
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}

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@ -38,39 +38,3 @@ const struct pad_config *variant_override_gpio_table(size_t *num)
*num = ARRAY_SIZE(default_override_table);
return default_override_table;
}
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = {
/* PCH_WP_OD */
PAD_CFG_GPI(GPIO_190, NONE, DEEP),
/* H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,
DISPUPD),
/* H1_SLAVE_SPI_CLK_R */
PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_CS_L_R */
PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MISO */
PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MOSI_R */
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1),
PAD_CFG_GPO(GPIO_178, 0, DEEP),
/* WLAN_PE_RST */
PAD_CFG_GPO(GPIO_164, 0, DEEP),
/*
* ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
* pull-up for proper operation. Since there is no external pull present
* on this platform, configure an internal weak pull-up.
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU),
};
const struct pad_config *variant_early_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}

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@ -101,48 +101,3 @@ const struct pad_config *variant_override_gpio_table(size_t *num)
}
return c;
}
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = {
/* PCH_WP_OD */
PAD_CFG_GPI(GPIO_190, NONE, DEEP),
/* H1_PCH_INT_ODL */
PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,
DISPUPD),
/* H1_SLAVE_SPI_CLK_R */
PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_CS_L_R */
PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MISO */
PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1),
/* H1_SLAVE_SPI_MOSI_R */
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1),
/* WLAN_PE_RST */
PAD_CFG_GPO(GPIO_164, 0, DEEP),
/*
* ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
* pull-up for proper operation. Since there is no external pull present
* on this platform, configure an internal weak pull-up.
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU),
};
const struct pad_config *variant_early_gpio_table(size_t *num)
{
/*
* This is a hack to configure EN_PP3300_WLAN based on board id. Once
* board id 0 is deprecated, we can get rid of this.
*/
uint32_t bid = board_id();
if (bid == UNDEFINED_STRAPPING_ID || bid < 1)
gpio_output(GPIO_178, 1);
else
gpio_output(GPIO_178, 0);
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}

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@ -0,0 +1 @@
bootblock-y += gpio.c

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@ -0,0 +1,53 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2018 Google LLC
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
* GNU General Public License for more details.
*/
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <gpio.h>
#include <soc/gpio.h>
/* GPIOs needed prior to ramstage. */
static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPI(GPIO_190, NONE, DEEP), /* PCH_WP_OD */
/* GSPI0_INT */
PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,
DISPUPD), /* H1_PCH_INT_ODL */
/* GSPI0_CLK */
PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */
/* GSPI0_CS# */
PAD_CFG_NF(GPIO_80, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CS_L_R */
/* GSPI0_MISO */
PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */
/* GSPI0_MOSI */
PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */
/* Enable power to wifi early in bootblock and de-assert PERST#. */
PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */
PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */
/*
* ESPI_IO1 acts as ALERT# (which is open-drain) and requies a weak
* pull-up for proper operation. Since there is no external pull present
* on this platform, configure an internal weak pull-up.
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU), /* ESPI_IO1 */
};
const struct pad_config *variant_early_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}