src/include: Add space after comma

Fix the following error detected by checkpatch.pl:

ERROR: space required after that ',' (ctx:VxV)

TEST=Build and run on Galileo Gen2

Change-Id: I297bfc3d03dc95b471d3bb4b13803e81963841b5
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18647
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy 2017-03-07 12:55:23 -08:00
parent 708fc274b5
commit ae3fd34e00
13 changed files with 18 additions and 18 deletions

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@ -183,7 +183,7 @@ struct boot_state_init_entry {
};
#if ENV_RAMSTAGE
#define BOOT_STATE_INIT_ATTR __attribute__ ((used,section (".bs_init")))
#define BOOT_STATE_INIT_ATTR __attribute__ ((used, section (".bs_init")))
#else
#define BOOT_STATE_INIT_ATTR __attribute__ ((unused))
#endif

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@ -22,9 +22,9 @@
* On LLVM we can still just include stdarg.h.
*/
#ifdef __GNUC__
#define va_start(v,l) __builtin_va_start(v,l)
#define va_start(v, l) __builtin_va_start(v, l)
#define va_end(v) __builtin_va_end(v)
#define va_arg(v,l) __builtin_va_arg(v,l)
#define va_arg(v, l) __builtin_va_arg(v, l)
typedef __builtin_va_list va_list;
#else
#include <stdarg.h>

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@ -80,7 +80,7 @@ static inline int is_e0_later_in_bsp(int nodeid)
// d0 will be treated as e0 with this methods, but the d0 nb_cfg_54 always 0
pci_devfn_t dev;
dev = PCI_DEV(0, 0x18+nodeid,2);
dev = PCI_DEV(0, 0x18+nodeid, 2);
val_old = pci_read_config32(dev, 0x80);
val = val_old;
val |= (1<<3);

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@ -10,7 +10,7 @@ void initialize_cpus(struct bus *cpu_bus);
void asmlinkage secondary_cpu_init(unsigned int cpu_index);
int cpu_phys_address_size(void);
#define __cpu_driver __attribute__ ((used,__section__(".rodata.cpu_driver")))
#define __cpu_driver __attribute__ ((used, __section__(".rodata.cpu_driver")))
#ifndef __SIMPLE_DEVICE__
/** start of compile time generated pci driver array */
extern struct cpu_driver _cpu_drivers[];

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@ -67,7 +67,7 @@ void stop_this_cpu(void);
#if !defined(__PRE_RAM__)
#define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
#define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), sizeof(*(ptr))))
struct __xchg_dummy { unsigned long a[100]; };
#define __xg(x) ((struct __xchg_dummy *)(x))
@ -111,11 +111,11 @@ static inline void lapic_write_atomic(unsigned long reg, unsigned long v)
#ifdef X86_GOOD_APIC
# define FORCE_READ_AROUND_WRITE 0
# define lapic_read_around(x) lapic_read(x)
# define lapic_write_around(x,y) lapic_write((x),(y))
# define lapic_write_around(x, y) lapic_write((x), (y))
#else
# define FORCE_READ_AROUND_WRITE 1
# define lapic_read_around(x) lapic_read(x)
# define lapic_write_around(x,y) lapic_write_atomic((x),(y))
# define lapic_write_around(x, y) lapic_write_atomic((x), (y))
#endif
static inline int lapic_remote_read(int apicid, int reg, unsigned long *pvalue)

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@ -75,7 +75,7 @@
#define LAPIC_DELIVERY_MODE_NMI (4<<8)
#define LAPIC_DELIVERY_MODE_EXTINT (7<<8)
#define GET_LAPIC_DELIVERY_MODE(x) (((x)>>8)&0x7)
#define SET_LAPIC_DELIVERY_MODE(x,y) (((x)&~0x700)|((y)<<8))
#define SET_LAPIC_DELIVERY_MODE(x, y) (((x)&~0x700)|((y)<<8))
#define LAPIC_MODE_FIXED 0x0
#define LAPIC_MODE_NMI 0x4
#define LAPIC_MODE_EXINT 0x7

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@ -113,7 +113,7 @@ enum AzaliaPinCfgMisc {
union AzaliaPinConfiguration {
unsigned int value;
struct __attribute__((aligned(4),packed)) {
struct __attribute__((aligned(4), packed)) {
enum AzaliaPinCfgPortConnectivity port:2;
unsigned char location:6;
enum AzaliaPinCfgDefaultDevice device:4;

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@ -54,7 +54,7 @@ struct pci_driver {
const unsigned short *devices;
};
#define __pci_driver __attribute__ ((used,__section__(".rodata.pci_driver")))
#define __pci_driver __attribute__ ((used, __section__(".rodata.pci_driver")))
/** start of compile time generated pci driver array */
extern struct pci_driver _pci_drivers[];
/** end of compile time generated pci driver array */

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@ -479,7 +479,7 @@
* 7:3 = slot
* 2:0 = function
*/
#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn) ((devfn) & 0x07)

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@ -46,10 +46,10 @@ struct resource {
};
/* Macros to generate index values for resources */
#define IOINDEX_SUBTRACTIVE(IDX,LINK) (0x10000000 + ((IDX) << 8) + LINK)
#define IOINDEX_SUBTRACTIVE(IDX, LINK) (0x10000000 + ((IDX) << 8) + LINK)
#define IOINDEX_SUBTRACTIVE_LINK(IDX) (IDX & 0xff)
#define IOINDEX(IDX,LINK) (((LINK) << 16) + IDX)
#define IOINDEX(IDX, LINK) (((LINK) << 16) + IDX)
#define IOINDEX_LINK(IDX) (( IDX & 0xf0000) >> 16)
#define IOINDEX_IDX(IDX) (IDX & 0xffff)

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@ -107,7 +107,7 @@ struct reg_script_bus_entry {
void (*reg_script_write)(struct reg_script_context *ctx);
};
#define REG_SCRIPT_TABLE_ATTRIBUTE __attribute__ ((used,section (".rsbe_init")))
#define REG_SCRIPT_TABLE_ATTRIBUTE __attribute__ ((used, section (".rsbe_init")))
#define REG_SCRIPT_BUS_ENTRY(bus_entry_) \
const struct reg_script_bus_entry *rsbe_ ## bus_entry_ \

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@ -29,7 +29,7 @@ typedef struct { int counter; } atomic_t;
* Atomically sets the value of v to i. Note that the guaranteed
* useful range of an atomic_t is only 24 bits.
*/
#define atomic_set(v,i) (((v)->counter) = (i))
#define atomic_set(v, i) (((v)->counter) = (i))
/**

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@ -3,8 +3,8 @@
#include <stddef.h>
#define min(a,b) MIN((a),(b))
#define max(a,b) MAX((a),(b))
#define min(a, b) MIN((a), (b))
#define max(a, b) MAX((a), (b))
void *memalign(size_t boundary, size_t size);
void *malloc(size_t size);