GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

CBMEM: Always use DYNAMIC_CBMEM 

Drop the implementation of statically allocated high memory
region for CBMEM. There is no longer the need to explicitly
select DYNAMIC_CBMEM, it is the only remaining choice.

Change-Id: Iadf6f27a134e05daa1038646d0b4e0b8f9f0587a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7851
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki 2014-11-28 11:24:19 +02:00
parent 2fb6b40ed0
commit ae98e83eb2
30 changed files with 7 additions and 408 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/Kconfig
View File

@ -159,14 +159,6 @@ config INCLUDE_CONFIG_FILE
config EARLY_CBMEM_INIT
def_bool !LATE_CBMEM_INIT
config DYNAMIC_CBMEM
bool
default n
help
Instead of reserving a static amount of CBMEM space the CBMEM
area grows dynamically. CBMEM can be used both in romstage (after
memory initialization) and ramstage.
config COLLECT_TIMESTAMPS
bool "Create a table of timestamps collected during boot"
default n
@ -200,7 +192,7 @@ config RELOCATABLE_MODULES
loaded anywhere and all the relocations are handled automatically.
config RELOCATABLE_RAMSTAGE
depends on (RELOCATABLE_MODULES && DYNAMIC_CBMEM && EARLY_CBMEM_INIT)
depends on (RELOCATABLE_MODULES && EARLY_CBMEM_INIT)
bool "Build the ramstage to be relocatable in 32-bit address space."
default n
help

21
src/arch/x86/boot/cbmem.c
View File

@ -26,21 +26,6 @@
#include <console/cbmem_console.h>
#include <timestamp.h>
#if !CONFIG_DYNAMIC_CBMEM
void get_cbmem_table(uint64_t *base, uint64_t *size)
{
uint64_t top_of_ram = get_top_of_ram();
if (top_of_ram >= HIGH_MEMORY_SIZE) {
*base = top_of_ram - HIGH_MEMORY_SIZE;
*size = HIGH_MEMORY_SIZE;
} else {
*base = 0;
*size = 0;
}
}
#endif /* !DYNAMIC_CBMEM */
#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
#if !defined(__PRE_RAM__)
@ -52,11 +37,7 @@ void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop)
void set_top_of_ram(uint64_t ramtop)
{
backup_top_of_ram(ramtop);
#if !CONFIG_DYNAMIC_CBMEM
cbmem_late_set_table(ramtop - HIGH_MEMORY_SIZE, HIGH_MEMORY_SIZE);
#else
cbmem_set_top((void*)(uintptr_t)ramtop);
#endif
}
#endif /* !__PRE_RAM__ */
@ -66,13 +47,11 @@ unsigned long __attribute__((weak)) get_top_of_ram(void)
return 0;
}
#if IS_ENABLED(CONFIG_DYNAMIC_CBMEM)
void *cbmem_top(void)
{
/* Top of cbmem is at lowest usable DRAM address below 4GiB. */
return (void *)get_top_of_ram();
}
#endif
#endif /* LATE_CBMEM_INIT */

9
src/arch/x86/boot/tables.c
View File

@ -101,11 +101,8 @@ void write_tables(void)
#endif /* CONFIG_GENERATE_MP_TABLE */
#if CONFIG_HAVE_ACPI_TABLES
#if CONFIG_DYNAMIC_CBMEM
#define MAX_ACPI_SIZE (144 * 1024)
#else
#define MAX_ACPI_SIZE (45 * 1024)
#endif
post_code(0x9c);
/* Write ACPI tables to F segment and high tables area */
@ -199,11 +196,7 @@ void write_tables(void)
/* FIXME: The high_table_base parameter is not reference when tables are high,
* or high_table_pointer >1 MB.
*/
#if CONFIG_DYNAMIC_CBMEM
u64 fixme_high_tables_base = 0;
#else
u64 fixme_high_tables_base = (u32)get_cbmem_toc();
#endif
/* Also put a forwarder entry into 0-4K */
new_high_table_pointer = write_coreboot_table(low_table_start, low_table_end,

1
src/cpu/allwinner/a10/Kconfig
View File

@ -14,7 +14,6 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
select CPU_HAS_BOOTBLOCK_INIT
select DYNAMIC_CBMEM
# The "eGON.BT0" header takes 32 bytes
config BOOTBLOCK_BASE

1
src/cpu/intel/fsp_model_206ax/Kconfig
View File

@ -42,7 +42,6 @@ config CPU_SPECIFIC_OPTIONS
select TSC_SYNC_MFENCE
select LAPIC_MONOTONIC_TIMER
select BROKEN_CAR_MIGRATE
select DYNAMIC_CBMEM
config BOOTBLOCK_CPU_INIT
string

1
src/cpu/intel/fsp_model_406dx/Kconfig
View File

@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS
select TSC_SYNC_MFENCE
select LAPIC_MONOTONIC_TIMER
select BROKEN_CAR_MIGRATE
select DYNAMIC_CBMEM
choice
prompt "Rangeley CPU Stepping"

1
src/cpu/intel/haswell/Kconfig
View File

@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS
select SMM_MODULES
select RELOCATABLE_MODULES
select RELOCATABLE_RAMSTAGE
select DYNAMIC_CBMEM
select SUPPORT_CPU_UCODE_IN_CBFS
#select AP_IN_SIPI_WAIT
select TSC_SYNC_MFENCE

5
src/cpu/intel/haswell/romstage.c
View File

@ -75,14 +75,11 @@ static inline u32 *stack_push(u32 *stack, u32 value)
static unsigned long choose_top_of_stack(void)
{
unsigned long stack_top;
#if CONFIG_DYNAMIC_CBMEM
/* cbmem_add() does a find() before add(). */
stack_top = (unsigned long)cbmem_add(CBMEM_ID_ROMSTAGE_RAM_STACK,
ROMSTAGE_RAM_STACK_SIZE);
stack_top += ROMSTAGE_RAM_STACK_SIZE;
#else
stack_top = CONFIG_RAMTOP;
#endif
return stack_top;
}

1
src/cpu/ti/am335x/Kconfig
View File

@ -7,7 +7,6 @@ config CPU_TI_AM335X
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
select CPU_HAS_BOOTBLOCK_INIT
select DYNAMIC_CBMEM
bool
default n

31
src/include/cbmem.h
View File

@ -118,8 +118,6 @@ struct cbmem_id_to_name {
struct cbmem_entry;
#if CONFIG_DYNAMIC_CBMEM
/*
* The dynamic cbmem infrastructure allows for growing cbmem dynamically as
* things are added. It requires an external function, cbmem_top(), to be
@ -171,35 +169,6 @@ int cbmem_entry_remove(const struct cbmem_entry *entry);
void *cbmem_entry_start(const struct cbmem_entry *entry);
u64 cbmem_entry_size(const struct cbmem_entry *entry);
#else /* !CONFIG_DYNAMIC_CBMEM */
/* Allocation with static CBMEM is resolved at build time. We start
* with 128kB and conditionally add some of the most greedy CBMEM
* table entries.
*/
#define _CBMEM_SZ_MINIMAL ( 128 * 1024 )
#define _CBMEM_SZ_TOTAL \
(_CBMEM_SZ_MINIMAL + CONFIG_CONSOLE_CBMEM_BUFFER_SIZE + \
HIGH_MEMORY_SAVE + HIGH_MEMORY_SCRATCH)
#define HIGH_MEMORY_SIZE ALIGN_UP(_CBMEM_SZ_TOTAL, 0x10000)
#ifndef __PRE_RAM__
void cbmem_late_set_table(uint64_t base, uint64_t size);
#endif
void get_cbmem_table(uint64_t *base, uint64_t *size);
struct cbmem_entry *get_cbmem_toc(void);
static inline const struct cbmem_entry *cbmem_entry_find(uint32_t id)
{
return NULL;
}
#endif /* CONFIG_DYNAMIC_CBMEM */
/* Common API between cbmem and dynamic cbmem. */
/* Returns 0 if old cbmem was recovered. Recovery is only attempted if
* s3resume is non-zero. */
int cbmem_recovery(int s3resume);

2
src/include/rmodule.h
View File

@ -54,7 +54,6 @@ int rmodule_calc_region(unsigned int region_alignment, size_t rmodule_size,
/* Support for loading rmodule stages. This API is only available when
* using dynamic cbmem because it uses the dynamic cbmem API to obtain
* the backing store region for the stage. */
#if CONFIG_DYNAMIC_CBMEM
struct cbfs_stage;
struct cbmem_entry;
@ -70,7 +69,6 @@ struct rmod_stage_load {
/* Both of the following functions return 0 on success, -1 on error. */
int rmodule_stage_load(struct rmod_stage_load *rsl, struct cbfs_stage *stage);
int rmodule_stage_load_from_cbfs(struct rmod_stage_load *rsl);
#endif
struct rmodule {
void *location;

13
src/lib/Makefile.inc
View File

@ -82,17 +82,8 @@ ramstage-y += memrange.c
ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c
# The CBMEM implementations are chosen based on CONFIG_DYNAMIC_CBMEM.
ifeq ($(CONFIG_DYNAMIC_CBMEM),y)
ramstage-y += dynamic_cbmem.c
romstage-y += dynamic_cbmem.c
else
ramstage-y += cbmem.c
romstage-y += cbmem.c
endif # CONFIG_DYNAMIC_CBMEM
romstage-y += cbmem_common.c
ramstage-y += cbmem_common.c
romstage-y += cbmem_common.c dynamic_cbmem.c
ramstage-y += cbmem_common.c dynamic_cbmem.c
ramstage-y += hexdump.c
romstage-y += hexdump.c

288
src/lib/cbmem.c
View File

@ -1,288 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
*/
#include <types.h>
#include <string.h>
#include <bootmem.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
#include <arch/early_variables.h>
#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__)
#include <arch/acpi.h>
#endif
// The CBMEM TOC reserves 512 bytes to keep
// the other entries somewhat aligned.
// Increase if MAX_CBMEM_ENTRIES exceeds 21
#define CBMEM_TOC_RESERVED 512
#define MAX_CBMEM_ENTRIES 16
#define CBMEM_MAGIC 0x434f5245
struct cbmem_entry {
u32 magic;
u32 id;
u64 base;
u64 size;
} __attribute__((packed));
#ifndef __PRE_RAM__
static uint64_t cbmem_base = 0;
static uint64_t cbmem_size = 0;
#endif
static void cbmem_trace_location(uint64_t base, uint64_t size, const char *s)
{
if (base && size && s) {
printk(BIOS_DEBUG, "CBMEM region %llx-%llx (%s)\n",
base, base + size - 1, s);
}
}
static void cbmem_locate_table(uint64_t *base, uint64_t *size)
{
#ifdef __PRE_RAM__
get_cbmem_table(base, size);
#else
if (!(cbmem_base && cbmem_size)) {
get_cbmem_table(&cbmem_base, &cbmem_size);
cbmem_trace_location(cbmem_base, cbmem_size, __FUNCTION__);
}
*base = cbmem_base;
*size = cbmem_size;
#endif
}
struct cbmem_entry *get_cbmem_toc(void)
{
uint64_t base, size;
cbmem_locate_table(&base, &size);
return (struct cbmem_entry *)(unsigned long)base;
}
#if !defined(__PRE_RAM__)
void cbmem_late_set_table(uint64_t base, uint64_t size)
{
cbmem_trace_location(base, size, __FUNCTION__);
cbmem_base = base;
cbmem_size = size;
}
#endif
/**
* cbmem is a simple mechanism to do some kind of book keeping of the coreboot
* high tables memory. This is a small amount of memory which is "stolen" from
* the system memory for coreboot purposes. Usually this memory is used for
* - the coreboot table
* - legacy tables (PIRQ, MP table)
* - ACPI tables
* - suspend/resume backup memory
*/
static void cbmem_initialize_empty(void)
{
uint64_t baseaddr, size;
struct cbmem_entry *cbmem_toc;
cbmem_locate_table(&baseaddr, &size);
cbmem_trace_location(baseaddr, size, __FUNCTION__);
if (!(baseaddr && size)) {
printk(BIOS_CRIT, "Unable to set location for CBMEM.\n");
return;
}
cbmem_toc = (struct cbmem_entry *)(unsigned long)baseaddr;
memset(cbmem_toc, 0, CBMEM_TOC_RESERVED);
cbmem_toc[0] = (struct cbmem_entry) {
.magic = CBMEM_MAGIC,
.id = CBMEM_ID_FREESPACE,
.base = baseaddr + CBMEM_TOC_RESERVED,
.size = size - CBMEM_TOC_RESERVED
};
}
static int cbmem_check_toc(void)
{
uint64_t baseaddr, size;
struct cbmem_entry *cbmem_toc;
cbmem_locate_table(&baseaddr, &size);
cbmem_trace_location(baseaddr, size, __FUNCTION__);
cbmem_toc = (struct cbmem_entry *)(unsigned long)baseaddr;
return (cbmem_toc[0].magic == CBMEM_MAGIC);
}
void *cbmem_add(u32 id, u64 size)
{
struct cbmem_entry *cbmem_toc;
int i;
void *p;
/*
* This could be a restart, check if the section is there already. It
* is remotely possible that the dram contents persisted over the
* bootloader upgrade AND the same section now needs more room, but
* this is quite a remote possibility and it is ignored here.
*/
p = cbmem_find(id);
if (p) {
printk(BIOS_NOTICE,
"CBMEM section %x: using existing location at %p.\n",
id, p);
return p;
}
cbmem_toc = get_cbmem_toc();
if (cbmem_toc == NULL) {
return NULL;
}
if (cbmem_toc[0].magic != CBMEM_MAGIC) {
printk(BIOS_ERR, "ERROR: CBMEM was not initialized yet.\n");
return NULL;
}
/* Will the entry fit at all? */
if (size > cbmem_toc[0].size) {
printk(BIOS_ERR, "ERROR: Not enough memory for table %x\n", id);
return NULL;
}
/* Align size to 512 byte blocks */
size = ALIGN(size, 512) < cbmem_toc[0].size ?
ALIGN(size, 512) : cbmem_toc[0].size;
/* Now look for the first free/usable TOC entry */
for (i = 0; i < MAX_CBMEM_ENTRIES; i++) {
if (cbmem_toc[i].id == CBMEM_ID_NONE)
break;
}
if (i >= MAX_CBMEM_ENTRIES) {
printk(BIOS_ERR, "ERROR: No more CBMEM entries available.\n");
return NULL;
}
printk(BIOS_DEBUG, "Adding CBMEM entry as no. %d\n", i);
cbmem_toc[i] = (struct cbmem_entry) {
.magic = CBMEM_MAGIC,
.id = id,
.base = cbmem_toc[0].base,
.size = size
};
cbmem_toc[0].base += size;
cbmem_toc[0].size -= size;
return (void *)(uintptr_t)cbmem_toc[i].base;
}
void *cbmem_find(u32 id)
{
struct cbmem_entry *cbmem_toc;
int i;
cbmem_toc = get_cbmem_toc();
if (cbmem_toc == NULL)
return NULL;
for (i = 0; i < MAX_CBMEM_ENTRIES; i++) {
if (cbmem_toc[i].id == id)
return (void *)(unsigned long)cbmem_toc[i].base;
}
return (void *)NULL;
}
/* Returns True if it was not initialized before. */
int cbmem_recovery(int is_wakeup)
{
int found = cbmem_check_toc();
int wipe = 0;
/* CBMEM TOC is wiped clean when we are not waking up from S3
* suspend. Boards with EARLY_CBMEM_INIT do this in romstage,
* boards without EARLY_CBMEM_INIT do this in ramstage.
*/
#if defined(__PRE_RAM__) && CONFIG_EARLY_CBMEM_INIT
wipe = 1;
#endif
#if !defined(__PRE_RAM__) && !CONFIG_EARLY_CBMEM_INIT
wipe = 1;
#endif
if (!is_wakeup && wipe)
cbmem_initialize_empty();
if (is_wakeup && !found) {
cbmem_initialize_empty();
cbmem_fail_resume();
}
/* Complete migration to CBMEM. */
cbmem_run_init_hooks();
return !found;
}
#ifndef __PRE_RAM__
static void init_cbmem_post_device(void *unused)
{
#if CONFIG_HAVE_ACPI_RESUME
cbmem_recovery(acpi_is_wakeup());
#else
cbmem_recovery(0);
#endif
}
BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY,
init_cbmem_post_device, NULL),
};
void cbmem_add_bootmem(void)
{
bootmem_add_range(cbmem_base, cbmem_size, LB_MEM_TABLE);
}
void cbmem_list(void)
{
struct cbmem_entry *cbmem_toc;
int i;
cbmem_toc = get_cbmem_toc();
if (cbmem_toc == NULL)
return;
for (i = 0; i < MAX_CBMEM_ENTRIES; i++) {
if (cbmem_toc[i].magic != CBMEM_MAGIC)
continue;
cbmem_print_entry(i, cbmem_toc[i].id, cbmem_toc[i].base,
cbmem_toc[i].size);
}
}
#endif

8
src/lib/rmodule.c
View File

@ -17,6 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <assert.h>
#include <cbmem.h>
#include <cbfs_core.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
@ -249,10 +251,6 @@ int rmodule_calc_region(unsigned int region_alignment, size_t rmodule_size,
return region_alignment - sizeof(struct rmodule_header);
}
#if CONFIG_DYNAMIC_CBMEM
#include <cbmem.h>
#include <cbfs_core.h>
int rmodule_stage_load(struct rmod_stage_load *rsl, struct cbfs_stage *stage)
{
struct rmodule rmod_stage;
@ -307,5 +305,3 @@ int rmodule_stage_load_from_cbfs(struct rmod_stage_load *rsl)
return rmodule_stage_load(rsl, stage);
}
#endif /* DYNAMIC_CBMEM */

1
src/mainboard/emulation/qemu-armv7/Kconfig
View File

@ -32,7 +32,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select ARM_ROMSTAGE_ARMV7
select ARM_RAMSTAGE_ARMV7
select BOARD_ROMSIZE_KB_4096
select DYNAMIC_CBMEM
config MAINBOARD_DIR
string

1
src/mainboard/emulation/qemu-i440fx/Kconfig
View File

@ -8,7 +8,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_256
select DYNAMIC_CBMEM
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG

4
src/mainboard/emulation/qemu-i440fx/northbridge.c
View File

@ -130,10 +130,6 @@ static void cpu_pci_domain_read_resources(struct device *dev)
"debugcon");
}
#if !CONFIG_DYNAMIC_CBMEM
set_top_of_ram(tomk * 1024);
#endif
if (q35 && ((tomk * 1024) < 0xb0000000)) {
/*
* Reserve the region between top-of-ram and the

1
src/mainboard/emulation/qemu-q35/Kconfig
View File

@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
# select HAVE_PIRQ_TABLE
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_256
select DYNAMIC_CBMEM
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_DO_NATIVE_VGA_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG

1
src/mainboard/gigabyte/ga-b75m-d3h/Kconfig
View File

@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_CMOS_DEFAULT
select HAVE_ACPI_RESUME
select HAVE_SMI_HANDLER
select DYNAMIC_CBMEM
select INTEL_INT15
select VGA
select INTEL_EDID

1
src/northbridge/intel/gm45/Kconfig
View File

@ -27,7 +27,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select HAVE_DEBUG_RAM_SETUP
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select IOMMU
select VGA
select INTEL_EDID

1
src/northbridge/intel/i945/Kconfig
View File

@ -26,7 +26,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select HAVE_DEBUG_RAM_SETUP
select LAPIC_MONOTONIC_TIMER
select VGA

1
src/northbridge/intel/nehalem/Kconfig
View File

@ -22,7 +22,6 @@ config NORTHBRIDGE_INTEL_NEHALEM
select CPU_INTEL_MODEL_2065X
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select VGA
select INTEL_EDID
select TSC_MONOTONIC_TIMER

4
src/northbridge/intel/sandybridge/Kconfig
View File

@ -22,7 +22,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE
select CACHE_MRC_BIN
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select CPU_INTEL_MODEL_206AX
select PER_DEVICE_ACPI_TABLES
@ -31,7 +30,6 @@ config NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE
select CACHE_MRC_BIN
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select CPU_INTEL_MODEL_206AX
select HAVE_DEBUG_RAM_SETUP
select PER_DEVICE_ACPI_TABLES
@ -41,7 +39,6 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
select CACHE_MRC_BIN
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select CPU_INTEL_MODEL_306AX
select PER_DEVICE_ACPI_TABLES
@ -50,7 +47,6 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE_NATIVE
select CACHE_MRC_BIN
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select DYNAMIC_CBMEM
select CPU_INTEL_MODEL_306AX
select HAVE_DEBUG_RAM_SETUP
select PER_DEVICE_ACPI_TABLES

1
src/soc/intel/baytrail/Kconfig
View File

@ -17,7 +17,6 @@ config CPU_SPECIFIC_OPTIONS
select COLLECT_TIMESTAMPS
select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
select SUPPORT_CPU_UCODE_IN_CBFS
select DYNAMIC_CBMEM
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
select HAVE_HARD_RESET

1
src/soc/intel/broadwell/Kconfig
View File

@ -22,7 +22,6 @@ config CPU_SPECIFIC_OPTIONS
select COLLECT_TIMESTAMPS
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select SUPPORT_CPU_UCODE_IN_CBFS
select DYNAMIC_CBMEM
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
select HAVE_HARD_RESET

2
src/soc/intel/fsp_baytrail/Kconfig
View File

@ -31,8 +31,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_VERSTAGE_X86_32
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select DYNAMIC_CBMEM
select BROKEN_CAR_MIGRATE
select HAVE_SMI_HANDLER
select HAVE_HARD_RESET
select MMCONF_SUPPORT

1
src/soc/nvidia/tegra124/Kconfig
View File

@ -7,7 +7,6 @@ config SOC_NVIDIA_TEGRA124
select ARCH_RAMSTAGE_ARMV7
select HAVE_UART_SPECIAL
select BOOTBLOCK_CONSOLE
select DYNAMIC_CBMEM
select ARM_BOOTBLOCK_CUSTOM
select ARM_LPAE

1
src/soc/samsung/exynos5250/Kconfig
View File

@ -6,7 +6,6 @@ config CPU_SAMSUNG_EXYNOS5250
select CPU_HAS_BOOTBLOCK_INIT
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
select DYNAMIC_CBMEM
bool
default n

1
src/soc/samsung/exynos5420/Kconfig
View File

@ -7,7 +7,6 @@ config CPU_SAMSUNG_EXYNOS5420
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
select RELOCATABLE_MODULES
select DYNAMIC_CBMEM
bool
default n

1
src/soc/ucb/riscv/Kconfig
View File

@ -4,7 +4,6 @@ config SOC_UCB_RISCV
select ARCH_VERSTAGE_RISCV
select ARCH_ROMSTAGE_RISCV
select ARCH_RAMSTAGE_RISCV
select DYNAMIC_CBMEM
bool
default n