From aeaabd3fa36950756f1cb818882ccafe8ff2c1f5 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Mon, 9 Jan 2017 12:33:22 -0600 Subject: [PATCH] amd/mct/ddr3: Wait for northbridge P-state transitions The existing code waiting for northbridge P-state transitions contained a logical error preventing correct operation. Fix the logical error and force coreboot to wait for the P-state transitions per the BKDG. Found-by: Coverity Scan #1347388 Change-Id: I35f498c836db1439734abe684354c18c8e160368 Signed-off-by: Timothy Pearson Reviewed-on: https://review.coreboot.org/18069 Reviewed-by: Martin Roth Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand --- src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 45b987bd61..0892857e68 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -6737,7 +6737,7 @@ void mct_ForceNBPState0_En_Fam15(struct MCTStatStruc *pMCTstat, /* Wait until CurNbPState == NbPstateLo */ do { dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174); - } while (((dword2 << 19) & 0x7) != (dword & 0x3)); + } while (((dword2 >> 19) & 0x7) != (dword & 0x3)); } dword = Get_NB32(pDCTstat->dev_nbctl, 0x170); dword &= ~(0x3 << 6); /* NbPstateHi = 0 */ @@ -6748,7 +6748,7 @@ void mct_ForceNBPState0_En_Fam15(struct MCTStatStruc *pMCTstat, /* Wait until CurNbPState == 0 */ do { dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174); - } while (((dword2 << 19) & 0x7) != 0); + } while (((dword2 >> 19) & 0x7) != 0); } } }