asrock/imb-a180: Switch away from AGESA_LEGACY_WRAPPER

Change-Id: I5e6e4cabe2b93c41da19412ec3ae2dfaa114bcc0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20714
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-03-04 07:33:30 +02:00
parent a84e34be25
commit aeadd84e7b
4 changed files with 33 additions and 58 deletions

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@ -17,14 +17,13 @@
#include "AGESA.h" #include "AGESA.h"
#include "amdlib.h" #include "amdlib.h"
#include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/state_machine.h>
#include "Ids.h" #include "Ids.h"
#include "heapManager.h" #include "heapManager.h"
#include "FchPlatform.h" #include "FchPlatform.h"
#include "cbfs.h" #include "cbfs.h"
#include <stdlib.h> #include <stdlib.h>
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr);
const BIOS_CALLOUT_STRUCT BiosCallouts[] = const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{ {
{AGESA_DO_RESET, agesa_Reset }, {AGESA_DO_RESET, agesa_Reset },
@ -34,7 +33,6 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] =
{AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
{AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
{AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
{AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
{AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
}; };
const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
@ -290,40 +288,16 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
} }
#endif #endif
/**
* Fch Oem setting callback void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset)
*
* Configure platform specific Hudson device,
* such Azalia, SATA, IMC etc.
*/
static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
{ {
AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; }
if (StdHeader->Func == AMD_INIT_RESET) { void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env)
FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData; {
printk(BIOS_DEBUG, "Fch OEM config in INIT RESET "); /* Azalia Controller OEM Cqodec Table Pointer */
//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */ FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST*)CodecTableList;
FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchParams_reset->FchReset.Xhci1Enable = FALSE; /* Fan Control */
} else if (StdHeader->Func == AMD_INIT_ENV) { //oem_fan_control(FchParams_env);
FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
/* Azalia Controller OEM Codec Table Pointer */
FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST*)CodecTableList;
/* Azalia Controller Front Panel OEM Table Pointer */
/* Fan Control */
//oem_fan_control(FchParams_env);
/* XHCI configuration */
FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchParams_env->Usb.Xhci1Enable = FALSE;
/* sata configuration */
}
printk(BIOS_DEBUG, "Done\n");
return AGESA_SUCCESS;
} }

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@ -17,7 +17,6 @@ if BOARD_ASROCK_IMB_A180
config BOARD_SPECIFIC_OPTIONS # dummy config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y
select AGESA_LEGACY_WRAPPER
select CPU_AMD_AGESA_FAMILY16_KB select CPU_AMD_AGESA_FAMILY16_KB
select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
select SOUTHBRIDGE_AMD_AGESA_YANGTZE select SOUTHBRIDGE_AMD_AGESA_YANGTZE

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@ -20,7 +20,7 @@
#include <PlatformMemoryConfiguration.h> #include <PlatformMemoryConfiguration.h>
#include "Filecode.h" #include "Filecode.h"
#include <northbridge/amd/agesa/agesawrapper.h> #include <northbridge/amd/agesa/state_machine.h>
#define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
@ -104,6 +104,13 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
.DdiLinkList = DdiList .DdiLinkList = DdiList
}; };
void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
{
FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
FchReset->Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
FchReset->Xhci1Enable = FALSE;
}
/*---------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------*/
/** /**
* OemCustomizeInitEarly * OemCustomizeInitEarly
@ -120,7 +127,7 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
**/ **/
/*---------------------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------------------*/
static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly) void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
{ {
AGESA_STATUS Status; AGESA_STATUS Status;
PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr; PCIe_COMPLEX_DESCRIPTOR *PcieComplexListPtr;
@ -142,14 +149,6 @@ static AGESA_STATUS OemInitEarly(AMD_EARLY_PARAMS * InitEarly)
PcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr; PcieComplexListPtr = (PCIe_COMPLEX_DESCRIPTOR *) AllocHeapParams.BufferPtr;
LibAmdMemCopy (PcieComplexListPtr, &PcieComplex, sizeof(PcieComplex), &InitEarly->StdHeader); LibAmdMemCopy (PcieComplexListPtr, &PcieComplex, sizeof(PcieComplex), &InitEarly->StdHeader);
InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr; InitEarly->GnbConfig.PcieComplexList = PcieComplexListPtr;
return AGESA_SUCCESS;
}
static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
{
/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
return AGESA_SUCCESS;
} }
/*---------------------------------------------------------------------------------------- /*----------------------------------------------------------------------------------------
@ -163,7 +162,7 @@ static AGESA_STATUS OemInitMid(AMD_MID_PARAMS * InitMid)
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will * is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings. * use its default conservative settings.
*/ */
CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = {
#define SEED_A 0x12 #define SEED_A 0x12
HW_RXEN_SEED( HW_RXEN_SEED(
@ -183,7 +182,13 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
PSO_END PSO_END
}; };
const struct OEM_HOOK OemCustomize = { void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
.InitEarly = OemInitEarly, {
.InitMid = OemInitMid, InitPost->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)PlatformMemoryTable;
}; }
void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
{
/* 0 iGpuVgaAdapter, 1 iGpuVgaNonAdapter; */
InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
}

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@ -22,7 +22,7 @@
#include <device/pci_def.h> #include <device/pci_def.h>
#include <arch/acpi.h> #include <arch/acpi.h>
#include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/BiosCallOuts.h>
#include <northbridge/amd/agesa/agesawrapper.h> #include <northbridge/amd/agesa/state_machine.h>
/********************************************** /**********************************************
* enable the dedicated function in mainboard. * enable the dedicated function in mainboard.
@ -30,9 +30,6 @@
static void mainboard_enable(device_t dev) static void mainboard_enable(device_t dev)
{ {
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
if (acpi_is_wakeup_s3())
agesawrapper_fchs3earlyrestore();
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {