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soc/amd/stoneyridge/cpu: use MSR_PSP_ADDR define instead of hex number

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Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id9042def0f5e9d2fa994d6729c592c7e2152976b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50405
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2021-02-08 22:14:17 +01:00
parent 060b8ad7a3
commit aecca7592b
1 changed files with 3 additions and 2 deletions
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5
src/soc/amd/stoneyridge/cpu.c
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@ -16,6 +16,7 @@
#include <soc/smi.h> #include <soc/smi.h>
#include <soc/iomap.h> #include <soc/iomap.h>
#include <console/console.h> #include <console/console.h>
#include <amdblocks/psp.h>
/* /*
* MP and SMM loading initialization. * MP and SMM loading initialization.
@ -121,10 +122,10 @@ static void model_15_init(struct device *dev)
uint32_t psp_bar; /* Note: NDA BKDG names this 32-bit register BAR3 */ uint32_t psp_bar; /* Note: NDA BKDG names this 32-bit register BAR3 */
psp_bar = pci_read_config32(SOC_PSP_DEV, PCI_BASE_ADDRESS_4); psp_bar = pci_read_config32(SOC_PSP_DEV, PCI_BASE_ADDRESS_4);
psp_bar &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; psp_bar &= ~PCI_BASE_ADDRESS_MEM_ATTR_MASK;
psp_msr = rdmsr(0xc00110a2); psp_msr = rdmsr(MSR_PSP_ADDR);
if (psp_msr.lo == 0) { if (psp_msr.lo == 0) {
psp_msr.lo = psp_bar; psp_msr.lo = psp_bar;
wrmsr(0xc00110a2, psp_msr); wrmsr(MSR_PSP_ADDR, psp_msr);
} }
} }