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replace outb -> port 0x80 with post_code() in some places. 

Especially most _smbus functions misuse port 0x80 writes for delays.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-06-07 08:29:36 +00:00 committed by Stefan Reinauer
parent c4f1a77cd2
commit aed992054f
4 changed files with 16 additions and 23 deletions
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22
src/cpu/amd/car/cache_as_ram.inc
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@ -49,9 +49,7 @@
/*for normal part %ebx already contain cpu_init_detected from fallback call */ /*for normal part %ebx already contain cpu_init_detected from fallback call */
cache_as_ram_setup: cache_as_ram_setup:
post_code(0xa0)
movb $0xA0, %al
outb %al, $0x80
/* enable SSE */ /* enable SSE */
movl %cr4, %eax movl %cr4, %eax
@ -284,8 +282,7 @@ wbcache_post_fam10_setup:
orl $(SYSCFG_MSR_MtrrVarDramEn | SYSCFG_MSR_MtrrFixDramEn), %eax orl $(SYSCFG_MSR_MtrrVarDramEn | SYSCFG_MSR_MtrrFixDramEn), %eax
wrmsr wrmsr
movb $0xA1, %al post_code(0xa1)
outb %al, $0x80
/* enable cache */ /* enable cache */
movl %cr0, %eax movl %cr0, %eax
@ -301,8 +298,7 @@ wbcache_post_fam10_setup:
jnc CAR_FAM10_ap jnc CAR_FAM10_ap
fam10_end_part1: fam10_end_part1:
movb $0xA2, %al post_code(0xa2)
outb %al, $0x80
/* Read the range with lodsl*/ /* Read the range with lodsl*/
cld cld
@ -320,8 +316,7 @@ fam10_end_part1:
movl $(CacheBase + CacheSize - GlobalVarSize), %eax movl $(CacheBase + CacheSize - GlobalVarSize), %eax
movl %eax, %esp movl %eax, %esp
movb $0xA3, %al post_code(0xa3)
outb %al, $0x80
jmp CAR_FAM10_ap_out jmp CAR_FAM10_ap_out
CAR_FAM10_ap: CAR_FAM10_ap:
@ -363,13 +358,11 @@ roll_cfg:
/* retrive init detected */ /* retrive init detected */
movl %esi, %ebx movl %esi, %ebx
movb $0xA4, %al post_code(0xa4)
outb %al, $0x80
CAR_FAM10_ap_out: CAR_FAM10_ap_out:
movb $0xA5, %al post_code(0xa5)
outb %al, $0x80
/* disable SSE */ /* disable SSE */
movl %cr4, %eax movl %cr4, %eax
@ -386,8 +379,7 @@ CAR_FAM10_ap_out:
call cache_as_ram_main call cache_as_ram_main
/* We will not go back */ /* We will not go back */
movb $0xAF, %al /* Should never see this postcode */ post_code(0xaf) /* Should never see this postcode */
outb %al, $0x80
fixed_mtrr_msr: fixed_mtrr_msr:
.long 0x250, 0x258, 0x259 .long 0x250, 0x258, 0x259

4
src/cpu/amd/model_lx/cache_as_ram.inc
View File

@ -169,8 +169,8 @@ leave_DCacheSetup:
popl %ecx popl %ecx
cmpl %ecx, %edx cmpl %ecx, %edx
je DCacheSetupGood je DCacheSetupGood
movb $0xC5, %al
outb %al, $0x80 post_code(0xc5)
DCacheSetupBad: DCacheSetupBad:
hlt /* issues */ hlt /* issues */
jmp DCacheSetupBad jmp DCacheSetupBad

4
src/cpu/via/car/cache_as_ram.inc
View File

@ -152,8 +152,8 @@ clear_fixed_var_mtrr_out:
movl %eax, %esp movl %eax, %esp
#ifdef CARTEST #ifdef CARTEST
testok: movb $0x40,%al testok:
outb %al, $0x80 post_code(0x40)
xorl %edx, %edx xorl %edx, %edx
xorl %eax, %eax xorl %eax, %eax
movl $0x5c5c,%edx movl $0x5c5c,%edx

9
src/mainboard/digitallogic/msm586seg/romstage.c
View File

@ -183,7 +183,7 @@ static void main(unsigned long bist)
// while(1) // while(1)
print_err("STATIC MEM DONE\n"); print_err("STATIC MEM DONE\n");
outb(0xee, 0x80); post_code(0xee);
print_err("loop forever ...\n"); print_err("loop forever ...\n");
#if 0 #if 0
@ -231,13 +231,14 @@ static void main(unsigned long bist)
*dst = *src; *dst = *src;
//print_err(" dst is now "); print_err_hex32(*dst); print_err("\n"); //print_err(" dst is now "); print_err_hex32(*dst); print_err("\n");
dst++, src++; dst++, src++;
outb((unsigned char)i, 0x80); post_code(i & 0xff);
} }
} }
dumpmem(); dumpmem();
outb(0, 0x80); post_code(0x00);
print_err("loop forever\n"); print_err("loop forever\n");
outb(0xdd, 0x80); post_code(0xdd);
__asm__ volatile( __asm__ volatile(
"movl %0, %%edi\n\t" "movl %0, %%edi\n\t"
"jmp *%%edi\n\t" "jmp *%%edi\n\t"