soc/intel/alderlake: Add chip config for DPA PreWake
The FSP includes a UPD to set the DPA (Dynamic Periodicity Alteration) PreWake value, which can be used to set the maximum pre-wake randomization time in "micro-ticks". This patch adds support for configuring that value. BUG=b:228410327 TEST=build FW and checked DPA value by fsp log. Signed-off-by: leo.chou <leo.chou@lcfc.corp-partner.google.com> Change-Id: I08897c590a88aba058cb9e364185ea0794e1e7c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64316 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -557,6 +557,13 @@ struct soc_intel_alderlake_config {
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uint8_t fivr_spread_spectrum;
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uint8_t fivr_spread_spectrum;
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/* Enable or Disable Acoustic Noise Mitigation feature */
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/* Enable or Disable Acoustic Noise Mitigation feature */
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uint8_t acoustic_noise_mitigation;
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uint8_t acoustic_noise_mitigation;
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/*
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* Acoustic Noise Mitigation Range. Defines the maximum Pre-Wake
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* randomization time in micro ticks. This can be programmed only
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* if AcousticNoiseMitigation is enabled.
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* Range 0-255
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*/
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uint8_t PreWake;
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/* Disable Fast Slew Rate for Deep Package C States for VR domains */
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/* Disable Fast Slew Rate for Deep Package C States for VR domains */
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uint8_t fast_pkg_c_ramp_disable[NUM_VR_DOMAINS];
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uint8_t fast_pkg_c_ramp_disable[NUM_VR_DOMAINS];
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/*
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/*
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@ -835,6 +835,7 @@ static void fill_fsps_acoustic_params(FSP_S_CONFIG *s_cfg,
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s_cfg->AcousticNoiseMitigation = config->acoustic_noise_mitigation;
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s_cfg->AcousticNoiseMitigation = config->acoustic_noise_mitigation;
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if (s_cfg->AcousticNoiseMitigation) {
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if (s_cfg->AcousticNoiseMitigation) {
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s_cfg->PreWake = config->PreWake;
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for (int i = 0; i < NUM_VR_DOMAINS; i++) {
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for (int i = 0; i < NUM_VR_DOMAINS; i++) {
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s_cfg->FastPkgCRampDisable[i] = config->fast_pkg_c_ramp_disable[i];
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s_cfg->FastPkgCRampDisable[i] = config->fast_pkg_c_ramp_disable[i];
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s_cfg->SlowSlewRate[i] = config->slow_slew_rate[i];
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s_cfg->SlowSlewRate[i] = config->slow_slew_rate[i];
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