From af05c86dcb2db29584ab68e77aeecc4906f034b7 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 26 Jun 2020 19:15:43 +0200 Subject: [PATCH] soc/amd/picasso/soc_util: add comment on the silicon and soc types Change-Id: I71704ab292edf8bd343370e6b72c47a8f3aceffd Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/42838 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Angel Pons --- src/soc/amd/picasso/soc_util.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/soc/amd/picasso/soc_util.c b/src/soc/amd/picasso/soc_util.c index 64a97a059e..12129206cf 100644 --- a/src/soc/amd/picasso/soc_util.c +++ b/src/soc/amd/picasso/soc_util.c @@ -9,6 +9,14 @@ #include #include +/* + * The Zen/Zen+ based APUs can be RV (sometimes called RV1), PCO or RV2 silicon. RV2 has less + * PCIe, USB3 and DisplayPort connectivity than RV(1) or PCO. A Picasso SoC is always PCO + * silicon, a Dali SoC can either be RV2 or fused-down PCO silicon that has the same + * connectivity as the RV2 one and Pollock is always RV2 silicon. Picasso and Dali are in a FP5 + * package while Pollock is in the smaller FT5 package. + */ + #define SOCKET_TYPE_SHIFT 28 #define SOCKET_TYPSE_MASK (0xf << SOCKET_TYPE_SHIFT)