diff --git a/src/soc/amd/cezanne/root_complex.c b/src/soc/amd/cezanne/root_complex.c
index dabfa789aa..9cb668e04d 100644
--- a/src/soc/amd/cezanne/root_complex.c
+++ b/src/soc/amd/cezanne/root_complex.c
@@ -114,6 +114,9 @@ static void read_resources(struct device *dev)
 	early_reserved_dram_start = e->base;
 	early_reserved_dram_end = e->base + e->size;
 
+	/* The root complex has no PCI BARs implemented, so there's no need to call
+	   pci_dev_read_resources for it */
+
 	/* 0x0 - 0x9ffff */
 	ram_resource(dev, idx++, 0, 0xa0000 / KiB);
 
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c
index a3a3d4ba64..d5fd10db9d 100644
--- a/src/soc/amd/picasso/root_complex.c
+++ b/src/soc/amd/picasso/root_complex.c
@@ -114,6 +114,9 @@ static void read_resources(struct device *dev)
 	early_reserved_dram_start = e->base;
 	early_reserved_dram_end = e->base + e->size;
 
+	/* The root complex has no PCI BARs implemented, so there's no need to call
+	   pci_dev_read_resources for it */
+
 	/* 0x0 - 0x9ffff */
 	ram_resource(dev, idx++, 0, 0xa0000 / KiB);
 
diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/sabrina/root_complex.c
index 2a3ed6f753..ae1b3b915a 100644
--- a/src/soc/amd/sabrina/root_complex.c
+++ b/src/soc/amd/sabrina/root_complex.c
@@ -116,6 +116,9 @@ static void read_resources(struct device *dev)
 	early_reserved_dram_start = e->base;
 	early_reserved_dram_end = e->base + e->size;
 
+	/* The root complex has no PCI BARs implemented, so there's no need to call
+	   pci_dev_read_resources for it */
+
 	/* 0x0 - 0x9ffff */
 	ram_resource(dev, idx++, 0, 0xa0000 / KiB);
 
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 0384e00b88..85ef19ef4d 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -60,6 +60,9 @@ static void read_resources(struct device *dev)
 	unsigned int idx = 0;
 	struct resource *res;
 
+	/* The northbridge has no PCI BARs implemented, so there's no need to call
+	   pci_dev_read_resources for it */
+
 	/*
 	 * This MMCONF resource must be reserved in the PCI domain.
 	 * It is not honored by the coreboot resource allocator if it is in