armv7-m: add empty cache routines
armv7-m does not have cache but adding empty cache functions allow us to transparently use code handling entering and leaving stages. BUG=none BRANCH=ToT TEST=Built coreboot for cosmos Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Change-Id: I23415b273c90401cd81f2bc94b2d69958f134c6a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 960453bf5d5fbf7dc75343b1cccaa62b6b8ec30c Original-Change-Id: Ief0c8a949e7e14d68473e7a093a8642d6058ccc6 Original-Reviewed-on: https://chromium-review.googlesource.com/225206 Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9383 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -52,8 +52,9 @@ bootblock-S-ccopts += $(armv7-m_asm_flags)
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ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y)
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bootblock-y += bootblock_simple.c
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bootblock-y += exception_m.c
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endif
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bootblock-y += exception_m.c
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bootblock-y += cache_m.c
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endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
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@ -0,0 +1,79 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* cache.c: Cache maintenance routines for ARMv7-M
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*/
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#include <stdint.h>
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#include <arch/cache.h>
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void tlb_invalidate_all(void)
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{
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}
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void dcache_clean_all(void)
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{
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}
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void dcache_clean_invalidate_all(void)
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{
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}
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void dcache_invalidate_all(void)
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{
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}
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unsigned int dcache_line_bytes(void)
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{
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return 0;
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}
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void dcache_clean_by_mva(void const *addr, size_t len)
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{
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}
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void dcache_clean_invalidate_by_mva(void const *addr, size_t len)
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{
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}
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void dcache_invalidate_by_mva(void const *addr, size_t len)
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{
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}
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void dcache_mmu_disable(void)
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{
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}
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void dcache_mmu_enable(void)
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{
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}
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void cache_sync_instructions(void)
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{
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}
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