mb/google/brya/var/*: Mark fingerprint reader as hidden

Windows doesn't have / will likely never have a signed driver for the
FPR, so set the device status as hidden so it will not appear as an
unknown device in Windows Device Manager. Linux does not check/care
about the ACPI device status.

TEST=build/boot Win11 on google/brya (kano), verify FPR does not show
up as unknown device under Device Manager.

Change-Id: Ie73fd9d448ecca9e9112abc0d92b4ab46ce3618d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>

src/mainboard/google/brya/variants/anahera/overridetree.cb

@@ -327,7 +327,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/anahera4es/overridetree.cb

@@ -309,7 +309,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/brask/overridetree.cb

@@ -153,7 +153,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/brya0/overridetree.cb

@@ -1065,7 +1065,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/crota/overridetree.cb

@@ -322,7 +322,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/gimble/overridetree.cb

@@ -261,7 +261,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/gimble4es/overridetree.cb

@@ -225,7 +225,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/kano/overridetree.cb

@@ -486,7 +486,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/marasov/overridetree.cb

@@ -354,7 +354,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/primus/overridetree.cb

@@ -314,7 +314,7 @@ chip soc/intel/alderlake
 				register "compat_string" = ""google,cros-ec-spi""
 				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
 				register "wake" = "GPE0_DW2_15"
-				device spi 0 on end
+				device spi 0 hidden end
 				register "has_power_resource" = "1"
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"

src/mainboard/google/brya/variants/primus4es/overridetree.cb

@@ -308,7 +308,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/redrix/overridetree.cb

@@ -495,7 +495,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/redrix4es/overridetree.cb

@@ -494,7 +494,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/skolas/overridetree.cb

@@ -989,7 +989,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/skolas4es/overridetree.cb

@@ -769,7 +769,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/taeko/overridetree.cb

@@ -578,7 +578,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/taeko4es/overridetree.cb

@@ -438,7 +438,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/vell/overridetree.cb

@@ -433,7 +433,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on

src/mainboard/google/brya/variants/zydron/overridetree.cb

@@ -464,7 +464,7 @@ chip soc/intel/alderlake
 				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
 				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
 				register "enable_delay_ms" = "3"
-				device spi 0 on end
+				device spi 0 hidden end
 			end # FPMCU
 		end
 		device ref pch_espi on