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mb/google/octopus/variants/garg: support LTE power sequence 

GPIOs related to power sequnce are
  GPIO_67  - EN_PP3300
  GPIO_117 - FULL_CARD_POWER_ON_OFF
  GPIO_161 - PLT_RST_LTE_L
1. Power on: GPIO_67 -> 0ms -> GPIO_117 -> 30ms -> GPIO_161
2. Power off: GPIO_161 -> 30ms -> GPIO_117 -> 100ms -> GPIO_67
3. Power reset:
  - keep GPIO_67 and GPIO_117 high and
  - pull down GPIO_161 for 30ms then release it.

BUG=b:137033609
BRANCH=octopus
TEST=build image and verify on the DUT with LTE DB.

Change-Id: I7bf6fee087c885c22363b44aa98aa61f91be90b4
Signed-off-by: Marco Chen <marcochen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Marco Chen 2019-07-10 13:13:45 +08:00 committed by Martin Roth
parent 9b0f933472
commit af62855ac4
3 changed files with 103 additions and 0 deletions
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13
src/mainboard/google/octopus/variants/baseboard/gpio.c
View File

@ -331,6 +331,19 @@ static const struct pad_config early_gpio_table[] = {
*/
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_151, UP_20K, DEEP, NF2, HIZCRx1,
ENPU), /* ESPI_IO1 */
/* GPIO_67 and GPIO_117 are in early_gpio_table and gpio_table. For variants
* having LTE SKUs, these two GPIOs would be overridden to output high first
* in the bootblock then be set to default state in gpio_table for non-LTE
* SKUs and keep to output high for LTE SKUs in ramstage.
*/
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_67, 0, DEEP, NONE, TxLASTRxE, DISPUPD), /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
PAD_CFG_GPI_SCI_LOW(GPIO_117, NONE, DEEP, EDGE_SINGLE),/* PCIE_WAKE1_B -- LTE_WAKE_L */
/* GPIO_161 is in early_gpio_table and gpio_table because LTE SKU needs
* to override this pin to output low then high respectively in two
* stages.
*/
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, Tx1RxDCRx0, DISPUPD), /* AVS_I2S1_MCLK -- LTE_OFF_ODL */
};
const struct pad_config *__weak

43
src/mainboard/google/octopus/variants/garg/gpio.c
View File

@ -50,6 +50,28 @@ static const struct pad_config hdmi_override_table[] = {
DISPUPD),
PAD_NC(GPIO_213, DN_20K),
};
static const struct pad_config lte_override_table[] = {
/* Default override table. */
PAD_NC(GPIO_104, UP_20K),
/* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD),
PAD_NC(GPIO_213, DN_20K),
/* Be specific to LTE SKU */
/* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
PAD_CFG_GPO(GPIO_67, 1, PWROK),
/* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
PAD_CFG_GPO(GPIO_117, 1, PWROK),
/* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
PAD_CFG_GPO(GPIO_161, 1, DEEP),
};
const struct pad_config *variant_override_gpio_table(size_t *num)
@ -61,8 +83,29 @@ const struct pad_config *variant_override_gpio_table(size_t *num)
case SKU_9_HDMI:
*num = ARRAY_SIZE(hdmi_override_table);
return hdmi_override_table;
case SKU_17_LTE:
*num = ARRAY_SIZE(lte_override_table);
return lte_override_table;
default:
*num = ARRAY_SIZE(default_override_table);
return default_override_table;
}
}
static const struct pad_config lte_early_override_table[] = {
/* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
PAD_CFG_GPO(GPIO_67, 1, PWROK),
/* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
PAD_CFG_GPO(GPIO_117, 1, PWROK),
/* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
PAD_CFG_GPO(GPIO_161, 0, DEEP),
};
const struct pad_config *variant_early_override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(lte_early_override_table);
return lte_early_override_table;
}

47
src/mainboard/google/octopus/variants/garg/variant.c
View File

@ -13,10 +13,13 @@
* GNU General Public License for more details.
*/
#include <arch/acpi.h>
#include <boardid.h>
#include <ec/google/chromeec/ec.h>
#include <drivers/intel/gma/opregion.h>
#include <baseboard/variants.h>
#include <delay.h>
#include <gpio.h>
enum {
SKU_1_2A2C = 1,
@ -24,6 +27,34 @@ enum {
SKU_17_LTE = 17,
};
struct gpio_with_delay {
gpio_t gpio;
unsigned int delay_msecs;
};
static void power_off_lte_module(u8 slp_typ)
{
const struct gpio_with_delay lte_power_off_gpios[] = {
{
GPIO_161, /* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
30,
},
{
GPIO_117, /* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
100
},
{
GPIO_67, /* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
0
}
};
for (int i = 0; i < ARRAY_SIZE(lte_power_off_gpios); i++) {
gpio_output(lte_power_off_gpios[i].gpio, 0);
mdelay(lte_power_off_gpios[i].delay_msecs);
}
}
const char *mainboard_vbt_filename(void)
{
uint32_t sku_id;
@ -37,3 +68,19 @@ const char *mainboard_vbt_filename(void)
return "vbt.bin";
}
}
void variant_smi_sleep(u8 slp_typ)
{
/* Currently use cases here all target to S5 therefore we do early return
* here for saving one transaction to the EC for getting SKU ID. */
if (slp_typ != ACPI_S5)
return;
switch (get_board_sku()) {
case SKU_17_LTE:
power_off_lte_module(slp_typ);
return;
default:
return;
}
}