mb/google/rex/var/rex0: Correct _PLD values for USB C0
Denote the correct value of ACPI _PLD for USB ports. The horizontal position of port C0 is incorrectly labelled. +----------------+ | | | Screen | | | +----------------+ C0 | | A0 | | C1 | | +----------------+ BUG=b:216490477 TEST=emerg-rex coreboot Signed-off-by: Won Chung <wonchung@google.com> Change-Id: Id9ed435ca0af131e3bb4538701fc97d78146899f Reviewed-on: https://review.coreboot.org/c/coreboot/+/74366 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -278,7 +278,7 @@ chip soc/intel/meteorlake
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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device ref tcss_usb3_port1 on end
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end
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end
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chip drivers/usb/acpi
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chip drivers/usb/acpi
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@ -319,7 +319,7 @@ chip soc/intel/meteorlake
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port2 on end
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device ref usb2_port2 on end
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end
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end
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chip drivers/usb/acpi
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chip drivers/usb/acpi
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