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siemens/mc_apl1: Disable internal UARTs 

APL internal UARTs are not used on this mainboard.

Change-Id: I39118262fc6f37b45785538a3f2d1d31d42cbe86
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/21406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Mario Scheithauer 2017-09-05 15:48:18 +02:00 committed by Werner Zeh
parent b83858af5b
commit af896d071b
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/siemens/mc_apl1/devicetree.cb
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@ -84,10 +84,10 @@ chip soc/intel/apollolake
device pci 17.1 off end # - I2C 5 device pci 17.1 off end # - I2C 5
device pci 17.2 off end # - I2C 6 device pci 17.2 off end # - I2C 6
device pci 17.3 on end # - I2C 7 device pci 17.3 on end # - I2C 7
device pci 18.0 on end # - UART 0 device pci 18.0 off end # - UART 0
device pci 18.1 on end # - UART 1 device pci 18.1 off end # - UART 1
device pci 18.2 on end # - UART 2 device pci 18.2 off end # - UART 2
device pci 18.3 on end # - UART 3 device pci 18.3 off end # - UART 3
device pci 19.0 off end # - SPI 0 device pci 19.0 off end # - SPI 0
device pci 19.1 off end # - SPI 1 device pci 19.1 off end # - SPI 1
device pci 19.2 off end # - SPI 2 device pci 19.2 off end # - SPI 2