Clean up ACPI:

- unify all iasl related rules into the toplevel Makefile
- build a filesystem standard for ACPI files and use it
- pass ACPI sources through cpp, so constants can be shared
  between C and ACPI more easily
- use cpp's #include instead of ACPI's Include() so cpp gets
  the whole picture

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-02-08 15:46:37 +00:00
parent 0e92974904
commit af97d33ec4
156 changed files with 152 additions and 543 deletions

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@ -138,12 +138,13 @@ subdirs:=$(PLATFORM-y) $(BUILD-y)
$(eval $(call evaluate_subdirs))
define c_dsl_template
$(obj)/$(1)%.c: src/$(1)%.dsl $(obj)/build.h
define objs_dsl_template
$(obj)/$(1)%.o: src/$(1)%.asl
@printf " IASL $$(subst $$(shell pwd)/,,$$(@))\n"
iasl -p $$(basename $$@) -tc $$<
perl -pi -e 's/AmlCode/AmlCode_$$(notdir $$(basename $$@))/g' $$(basename $$@).hex
mv $$(basename $$@).hex $$@
$(CPP) -D__ACPI__ -P $(CPPFLAGS) -include $(obj)/config.h -I$(src) -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$@).asl
iasl -p $$(basename $$@) -tc $$(basename $$@).asl
mv $$(basename $$@).hex $$(basename $$@).c
$(CC) -m32 $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $$@))), -DAmlCode=AmlCode_$$(basename $$(notdir $$@))) -c -o $$@ $$(basename $$@).c
endef
define objs_c_template
@ -196,7 +197,7 @@ endef
usetemplate=$(foreach d,$(sort $(dir $($(1)))),$(eval $(call $(1)_$(2)_template,$(subst $(obj)/,,$(d)))))
usetemplate=$(foreach d,$(sort $(dir $($(1)))),$(eval $(call $(1)_$(2)_template,$(subst $(obj)/,,$(d)))))
$(eval $(call usetemplate,c,dsl))
$(eval $(call usetemplate,objs,dsl))
$(eval $(call usetemplate,objs,c))
$(eval $(call usetemplate,objs,S))
$(eval $(call usetemplate,initobjs,c))

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@ -48,13 +48,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
mv $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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@ -53,13 +53,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
mv $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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@ -48,13 +48,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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@ -27,7 +27,7 @@
0x00010001
)
{
Include ("debug.asl")
#include "debug.asl"
}
*/

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@ -19,7 +19,7 @@
/*
Scope(\_SB) {
Include ("globutil.asl")
#include "globutil.asl"
}
*/

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@ -22,7 +22,7 @@ Scope (_SB) {
Device(PCI0) {
Device(IDEC) {
Name(_ADR, 0x00140001)
Include ("ide.asl")
#include "ide.asl"
}
}
}

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@ -21,7 +21,7 @@
DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
)
{
Include ("routing.asl")
#include "routing.asl"
}
*/

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@ -24,7 +24,7 @@ Scope (_SB) {
Device(PCI0) {
Device(SATA) {
Name(_ADR, 0x00120000)
Include ("sata.asl")
#include "sata.asl"
}
}
}

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@ -22,7 +22,7 @@
DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
)
{
Include ("usb.asl")
#include "usb.asl"
}
*/
Method(UCOC, 0) {

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@ -27,7 +27,7 @@ DefinitionBlock (
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
/* Include ("debug.asl") */ /* Include global debug methods if needed */
/* #include "acpi/debug.asl" */ /* Include global debug methods if needed */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
@ -370,7 +370,7 @@ DefinitionBlock (
}
}
Include ("routing.asl")
#include "acpi/routing.asl"
Scope(\_SB) {
@ -1119,11 +1119,11 @@ DefinitionBlock (
} /* End Scope GPE */
Include ("usb.asl")
#include "acpi/usb.asl"
/* South Bridge */
Scope(\_SB) { /* Start \_SB scope */
Include ("globutil.asl") /* global utility methods expected within the \_SB scope */
#include "acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
/* _SB.PCI0 */
/* Note: Only need HID on Primary Bus */
@ -1222,7 +1222,7 @@ DefinitionBlock (
/* Describe the Southbridge devices */
Device(STCR) {
Name(_ADR, 0x00120000)
Include ("sata.asl")
#include "acpi/sata.asl"
} /* end STCR */
Device(UOH1) {
@ -1262,7 +1262,7 @@ DefinitionBlock (
/* Primary (and only) IDE channel */
Device(IDEC) {
Name(_ADR, 0x00140001)
Include ("ide.asl")
#include "acpi/ide.asl"
} /* end IDEC */
Device(AZHD) {

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@ -48,13 +48,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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@ -27,7 +27,7 @@
0x00010001
)
{
Include ("debug.asl")
#include "debug.asl"
}
*/

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@ -19,7 +19,7 @@
/*
Scope(\_SB) {
Include ("globutil.asl")
#include "globutil.asl"
}
*/

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@ -22,7 +22,7 @@ Scope (_SB) {
Device(PCI0) {
Device(IDEC) {
Name(_ADR, 0x00140001)
Include ("ide.asl")
#include "ide.asl"
}
}
}

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@ -21,7 +21,7 @@
DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
)
{
Include ("routing.asl")
#include "routing.asl"
}
*/

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@ -24,7 +24,7 @@ Scope (_SB) {
Device(PCI0) {
Device(SATA) {
Name(_ADR, 0x00120000)
Include ("sata.asl")
#include "sata.asl"
}
}
}

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@ -22,7 +22,7 @@
DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
)
{
Include ("usb.asl")
#include "usb.asl"
}
*/
Method(UCOC, 0) {

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@ -27,7 +27,7 @@ DefinitionBlock (
0x00010001 /* OEM Revision */
)
{ /* Start of ASL file */
/* Include ("debug.asl") */ /* Include global debug methods if needed */
/* #include "acpi/debug.asl" */ /* Include global debug methods if needed */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
@ -370,7 +370,7 @@ DefinitionBlock (
}
}
Include ("routing.asl")
#include "acpi/routing.asl"
Scope(\_SB) {
@ -1118,11 +1118,11 @@ DefinitionBlock (
} /* End Scope GPE */
Include ("usb.asl")
#include "acpi/usb.asl"
/* South Bridge */
Scope(\_SB) { /* Start \_SB scope */
Include ("globutil.asl") /* global utility methods expected within the \_SB scope */
#include "acpi/globutil.asl" /* global utility methods expected within the \_SB scope */
/* _SB.PCI0 */
/* Note: Only need HID on Primary Bus */
@ -1221,7 +1221,7 @@ DefinitionBlock (
/* Describe the Southbridge devices */
Device(STCR) {
Name(_ADR, 0x00120000)
Include ("sata.asl")
#include "acpi/sata.asl"
} /* end STCR */
Device(UOH1) {
@ -1261,7 +1261,7 @@ DefinitionBlock (
/* Primary (and only) IDE channel */
Device(IDEC) {
Name(_ADR, 0x00140001)
Include ("ide.asl")
#include "acpi/ide.asl"
} /* end IDEC */
Device(AZHD) {

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@ -26,13 +26,12 @@ obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt2.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt3.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt4.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.o
# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
obj-y += ssdt2.o
obj-y += ssdt3.o
obj-y += ssdt4.o
driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o
# This is part of the conversion to init-obj and away from included code.
@ -54,28 +53,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
iasl -p $(obj)/pci2 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' $(obj)/pci2.hex
mv $(obj)/pci2.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
iasl -p $(obj)/pci3 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' $(obj)/pci3.hex
mv $(obj)/pci3.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
iasl -p $(obj)/pci4 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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@ -89,9 +89,9 @@
}
}
Include ("amd8111_pic.asl")
#include "amd8111_pic.asl"
Include ("amd8111_isa.asl")
#include "amd8111_isa.asl"
Device (TP2P)
{

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@ -170,7 +170,7 @@
IRQNoFlags () {1}
})
}
Include ("superio.asl")
#include "superio.asl"
}

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@ -0,0 +1,2 @@
#include "amd8111.asl" //real SB at first
#include "amd8131.asl"

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@ -0,0 +1 @@
#include "amd8132_2.asl"

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@ -0,0 +1 @@
#include "amd8151.asl"

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@ -0,0 +1 @@
#include "amd8131_2.asl"

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@ -0,0 +1 @@
// #include "w83627hf.asl"

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@ -103,7 +103,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci0_hc.asl")
#include "acpi/pci0_hc.asl"
}
Device (PCI1)
@ -206,7 +206,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Z00A, 8
}
Include ("../../../../../src/northbridge/amd/amdk8/amdk8_util.asl")
#include "northbridge/amd/amdk8/amdk8_util.asl"
}

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@ -1,2 +0,0 @@
Include ("amd8111.asl") //real SB at first
Include ("amd8131.asl")

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@ -1 +0,0 @@
Include ("amd8132_2.asl")

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@ -1 +0,0 @@
Include ("amd8151.asl")

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@ -1 +0,0 @@
Include ("amd8131_2.asl")

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@ -1 +0,0 @@
// Include ("w83627hf.asl")

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@ -1,12 +1,12 @@
At this time, For acpi support We got
1. support AMK K8 SRAT --- dynamically (coreboot run-time) (src/northbridge/amd/amdk8/amdk8_acpi.c)
2. support MADT ---- dynamically (coreboot run-time) (src/northbridge/amd/amdk8/amdk8_acpi.c , src/mainboard/amd/serengeti_cheetah/acpi_tables.c)
3. support DSDT ---- dynamically (Compile time, coreboot run-time, ACPI run-time) (src/mainboard/amd/serengeti_cheetah/{dx/*, get_bus_conf.c}, src/northbridge/amd/amdk8/get_sblk_pci1234.c)
3. support DSDT ---- dynamically (Compile time, coreboot run-time, ACPI run-time) (src/mainboard/amd/serengeti_cheetah/{acpi/*, get_bus_conf.c}, src/northbridge/amd/amdk8/get_sblk_pci1234.c)
4. Chipset support: amd8111, amd8132
The developers need to change for different MB
Change dx/dsdt_lb.dsl, according to MB layout
Change dsdt.asl, according to MB layout
pci1, pci2, pci3, pci4, ...., pci8
if there is HT-IO board, may use pci2.asl.... to create ssdt2.c, and ssdt3,c and ssdt4.c, ....ssdt8.c

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@ -60,7 +60,7 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci2_hc.asl")
#include "acpi/pci2_hc.asl"
}
}

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@ -60,7 +60,7 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci3_hc.asl")
#include "acpi/pci3_hc.asl"
}
}

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@ -60,7 +60,7 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci4_hc.asl")
#include "acpi/pci4_hc.asl"
}
}

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@ -51,33 +51,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/dsdt -tc $<
mv $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci2 -tc $<
perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci2.hex
mv $(obj)/mainboard/$(MAINBOARDDIR)/pci2.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci3 -tc $<
perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci3.hex
mv $(obj)/mainboard/$(MAINBOARDDIR)/pci3.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci4 -tc $<
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci4.hex
mv $(obj)/mainboard/$(MAINBOARDDIR)/pci4.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/pci5 -tc $<
perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex
mv $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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@ -97,9 +97,9 @@
}
}
Include ("amd8111_pic.asl")
#include "amd8111_pic.asl"
Include ("amd8111_isa.asl")
#include "amd8111_isa.asl"
Device (TP2P)
{

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@ -186,7 +186,7 @@
IRQNoFlags () {1}
})
}
Include ("superio.asl")
#include "superio.asl"
}

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@ -16,5 +16,5 @@
// along with this program; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
Include ("htx_no_ioapic.asl")
#include "amd8111.asl" //real SB at first
#include "amd8132.asl"

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@ -17,4 +17,4 @@
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
Include ("amd8132_2.asl")
#include "amd8132_2.asl"

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@ -17,4 +17,4 @@
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
Include ("amd8151.asl")
#include "amd8151.asl"

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@ -17,4 +17,4 @@
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
Include ("amd8131_2.asl")
#include "amd8131_2.asl"

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@ -0,0 +1,20 @@
//
// This file is part of the coreboot project.
//
// Copyright (C) 2007 Advanced Micro Devices, Inc.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
#include "htx_no_ioapic.asl"

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@ -17,4 +17,4 @@
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
// Include ("w83627hf.asl")
// #include "w83627hf.asl"

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@ -119,7 +119,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci0_hc.asl")
#include "acpi/pci0_hc.asl"
}
Device (PCI1)
@ -238,5 +238,5 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Z00A, 8
}
Include ("../../../../../src/northbridge/amd/amdfam10/amdfam10_util.asl")
#include "northbridge/amd/amdfam10/amdfam10_util.asl"
}

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@ -1,20 +0,0 @@
//
// This file is part of the coreboot project.
//
// Copyright (C) 2007 Advanced Micro Devices, Inc.
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation; version 2 of the License.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// along with this program; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
//
Include ("amd8111.asl") //real SB at first
Include ("amd8132.asl")

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@ -75,7 +75,7 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci2_hc.asl")
#include "acpi/pci2_hc.asl"
}
}

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@ -75,7 +75,7 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci3_hc.asl")
#include "acpi/pci3_hc.asl"
}
}

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@ -75,7 +75,7 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci4_hc.asl")
#include "acpi/pci4_hc.asl"
}
}

View File

@ -76,7 +76,7 @@ DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci5_hc.asl")
#include "acpi/pci5_hc.asl"
}
}

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@ -45,28 +45,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
mv dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex
mv pci2.hex ssdt2.c
$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"
iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/
perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex
mv pci3.hex ssdt3.c
$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"
iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -27,13 +27,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -39,13 +39,6 @@ ldscripts += $(src)/cpu/x86/32bit/entry32.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -22,7 +22,7 @@
DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
{
Include ("../../../../src/northbridge/amd/amdk8/amdk8_util.asl")
#include "northbridge/amd/amdk8/amdk8_util.asl"
/* For now only define 2 power states:
* - S0 which is fully on

View File

@ -44,13 +44,6 @@ crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -53,13 +53,6 @@ endif
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/ap_romstage.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c -o $@

View File

@ -23,7 +23,7 @@
DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1)
{
Include ("../../../../src/northbridge/amd/amdk8/amdk8_util.asl")
#include "northbridge/amd/amdk8/amdk8_util.asl"
/* For now only define 2 power states:
* - S0 which is fully on

View File

@ -51,14 +51,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(CPP) -D__ACPI__ -P $(CPPFLAGS) -include $(obj)/config.h -I$(src)/mainboard/$(MAINBOARDDIR) $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl -o $(obj)/dsdt.asl
iasl -p $(obj)/dsdt -tc $(obj)/dsdt.asl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -26,13 +26,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
iasl -p $(obj)/mainboard/$(MAINBOARDDIR)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.dsl
mv $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -26,15 +26,13 @@ obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt2.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt3.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt4.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += ssdt5.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.o
# ./ssdt.o is in northbridge/amd/amdk8/Config.lb
obj-y += ssdt2.o
obj-y += ssdt3.o
obj-y += ssdt4.o
obj-y += ssdt5.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o
@ -54,33 +52,6 @@ ldscripts += $(src)/arch/i386/lib/failover.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/dsdt_lb.dsl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
iasl -p $(obj)/pci2 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' $(obj)/pci2.hex
mv $(obj)/pci2.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
iasl -p $(obj)/pci3 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' $(obj)/pci3.hex
mv $(obj)/pci3.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
iasl -p $(obj)/pci4 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/ssdt5.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl
iasl -p $(obj)/pci5 -tc $(src)/mainboard/$(MAINBOARDDIR)/dx/pci5.asl
perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/pci5.hex
mv $(obj)/pci5.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

View File

@ -89,9 +89,9 @@
}
}
Include ("amd8111_pic.asl")
#include "amd8111_pic.asl"
Include ("amd8111_isa.asl")
#include "amd8111_isa.asl"
Device (TP2P)
{

View File

@ -170,7 +170,7 @@
IRQNoFlags () {1}
})
}
Include ("superio.asl")
#include "superio.asl"
}

View File

@ -0,0 +1,2 @@
#include "amd8111.asl" //real SB at first
#include "amd8131.asl"

View File

@ -0,0 +1 @@
#include "amd8132_2.asl"

View File

@ -0,0 +1 @@
#include "amd8151.asl"

View File

@ -0,0 +1 @@
#include "amd8131_2.asl"

View File

@ -0,0 +1 @@
#include "htx_no_ioapic.asl"

View File

@ -0,0 +1 @@
// #include "w83627hf.asl"

View File

@ -103,7 +103,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci0_hc.asl")
#include "acpi/pci0_hc.asl"
}
Device (PCI1)
@ -206,7 +206,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Z00A, 8
}
Include ("../../../../../src/northbridge/amd/amdk8/amdk8_util.asl")
#include "northbridge/amd/amdk8/amdk8_util.asl"
}

View File

@ -1,2 +0,0 @@
Include ("amd8111.asl") //real SB at first
Include ("amd8131.asl")

View File

@ -1 +0,0 @@
Include ("amd8132_2.asl")

View File

@ -1 +0,0 @@
Include ("amd8151.asl")

View File

@ -1 +0,0 @@
Include ("amd8131_2.asl")

View File

@ -1 +0,0 @@
Include ("htx_no_ioapic.asl")

View File

@ -1 +0,0 @@
// Include ("w83627hf.asl")

View File

@ -60,7 +60,7 @@ DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci2_hc.asl")
#include "acpi/pci2_hc.asl"
}
}

View File

@ -60,7 +60,7 @@ DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci3_hc.asl")
#include "acpi/pci3_hc.asl"
}
}

View File

@ -60,7 +60,7 @@ DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci4_hc.asl")
#include "acpi/pci4_hc.asl"
}
}

View File

@ -60,7 +60,7 @@ DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMD-K8", "AMDACPI", 100925440)
Return (Local3)
}
Include ("pci5_hc.asl")
#include "acpi/pci5_hc.asl"
}
}

View File

@ -47,14 +47,6 @@ ldscripts += $(src)/cpu/x86/32bit/entry32.lds
ifdef POST_EVALUATION
$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
$(CPP) -D__ACPI__ -P $(CPPFLAGS) -include $(obj)/config.h -I$(src)/mainboard/$(MAINBOARDDIR) $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl -o $(obj)/dsdt.asl
iasl -p $(obj)/dsdt -tc $(obj)/dsdt.asl
mv $(obj)/dsdt.hex $@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@

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