mb/facebook/monolith: Enable SpeedStep and DPTF
BUG=N/A TEST=tested using fwts on facebook monolith. Change-Id: Ia3dd195f887055448d42a7584e2c88322f0ec44b Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38131 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
parent
dfd89fc85b
commit
af995bbd75
|
@ -20,10 +20,14 @@ chip soc/intel/skylake
|
||||||
# LPC serial IRQ
|
# LPC serial IRQ
|
||||||
register "serirq_mode" = "SERIRQ_CONTINUOUS"
|
register "serirq_mode" = "SERIRQ_CONTINUOUS"
|
||||||
|
|
||||||
# Enable "Intel Speed Shift Technology"
|
# "Intel SpeedStep Technology"
|
||||||
|
register "eist_enable" = "1"
|
||||||
|
|
||||||
|
# "Intel Speed Shift Technology"
|
||||||
register "speed_shift_enable" = "1"
|
register "speed_shift_enable" = "1"
|
||||||
|
|
||||||
register "dptf_enable" = "0"
|
# DPTF
|
||||||
|
register "dptf_enable" = "1"
|
||||||
|
|
||||||
# FSP Configuration
|
# FSP Configuration
|
||||||
register "EnableAzalia" = "1"
|
register "EnableAzalia" = "1"
|
||||||
|
|
Loading…
Reference in New Issue