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uart: Redefine Kconfig options 

Option DRIVERS_UART builds with support for UART hardware.
Option CONSOLE_SERIAL enables the console output for UART.

Those x86 boards that do not have serial port on SuperIO should select
NO_UART_ON_SUPERIO to disable 8250 UART for the default configuration.

Removes:
  CONSOLE_SERIAL_UART
  HAVE_UART_IO_MAPPED
  HAVE_UART_MEMORY_MAPPED

Renames:
  CONSOLE_SERIAL8250     ->  DRIVERS_UART_8250IO
  CONSOLE_SERIAL8250MEM  ->  DRIVERS_UART_8250MEM

Change-Id: Id3afa05f85c0d6849746886db8b6c2ed6c846b61
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5311
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Kyösti Mälkki 2014-02-13 17:16:22 +02:00 committed by Patrick Georgi
parent bbf6f3d384
commit afa7b13b93
24 changed files with 79 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/arch/armv7/early_console.c
View File

@ -28,7 +28,7 @@ void console_tx_byte(unsigned char byte)
if (byte == '\n')
console_tx_byte('\r');
#if CONFIG_CONSOLE_SERIAL_UART
#if CONFIG_CONSOLE_SERIAL
uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_CBMEM && !defined(__BOOT_BLOCK__)
@ -38,7 +38,7 @@ void console_tx_byte(unsigned char byte)
static void _console_tx_flush(void)
{
#if CONFIG_CONSOLE_SERIAL_UART
#if CONFIG_CONSOLE_SERIAL
uart_tx_flush();
#endif
}

6
src/arch/x86/lib/romcc_console.c
View File

@ -30,7 +30,7 @@
*/
#define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO
#include "drivers/uart/util.c"
#include "drivers/uart/uart8250io.c"
#endif
@ -40,7 +40,7 @@
static void __console_tx_byte(unsigned char byte)
{
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL
uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_NE2K
@ -61,7 +61,7 @@ static void __console_tx_nibble(unsigned nibble)
static void __console_tx_char(int loglevel, unsigned char byte)
{
if (console_loglevel >= loglevel) {
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL
uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_NE2K

10
src/arch/x86/lib/romstage_console.c
View File

@ -31,10 +31,7 @@ void console_tx_byte(unsigned char byte)
if (byte == '\n')
console_tx_byte('\r');
#if CONFIG_CONSOLE_SERIAL8250MEM
uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL
uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__))
@ -53,10 +50,7 @@ void console_tx_byte(unsigned char byte)
void console_tx_flush(void)
{
#if CONFIG_CONSOLE_SERIAL8250MEM
uart_tx_flush();
#endif
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL
uart_tx_flush();
#endif
#if CONFIG_CONSOLE_NE2K

43
src/console/Kconfig
View File

@ -29,37 +29,29 @@ config SQUELCH_EARLY_SMP
config CONSOLE_SERIAL
bool "Serial port console output"
default y
depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL
help
Send coreboot debug output to a serial port (should be one or more of
CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART)
Send coreboot debug output to a serial port.
config CONSOLE_SERIAL8250
bool "Serial port console output (I/O mapped, 8250-compatible)"
depends on CONSOLE_SERIAL
depends on HAVE_UART_IO_MAPPED
default y
help
Send coreboot debug output to an I/O mapped serial port console.
The type of serial port driver selected based on your configuration is
shown on the following menu line. Supporting multiple different types
of UARTs in one build is not supported.
config CONSOLE_SERIAL8250MEM
bool "Serial port console output (memory mapped, 8250-compatible)"
depends on CONSOLE_SERIAL
depends on HAVE_UART_MEMORY_MAPPED
help
Send coreboot debug output to a memory mapped serial port console.
if CONSOLE_SERIAL
config CONSOLE_SERIAL_UART
bool "Serial port console output (device-specific UART)"
depends on CONSOLE_SERIAL
comment "I/O mapped, 8250-compatible"
depends on DRIVERS_UART_8250IO
comment "memory mapped, 8250-compatible"
depends on DRIVERS_UART_8250MEM
comment "device-specific UART"
depends on HAVE_UART_SPECIAL
default y
help
Send coreboot debug output to a device-specific serial port console.
choice
prompt "Serial port for 8250"
default CONSOLE_SERIAL_COM1
depends on CONSOLE_SERIAL8250
depends on DRIVERS_UART_8250IO
config CONSOLE_SERIAL_COM1
bool "COM1/ttyS0, I/O port 0x3f8"
@ -82,7 +74,7 @@ endchoice
config TTYS0_BASE
hex
depends on CONSOLE_SERIAL8250
depends on DRIVERS_UART_8250IO
default 0x3f8 if CONSOLE_SERIAL_COM1
default 0x2f8 if CONSOLE_SERIAL_COM2
default 0x3e8 if CONSOLE_SERIAL_COM3
@ -93,7 +85,6 @@ config TTYS0_BASE
choice
prompt "Baud rate"
default CONSOLE_SERIAL_115200
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_115200
bool "115200"
@ -133,7 +124,9 @@ config TTYS0_BAUD
config TTYS0_LCS
int
default 3
depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM
depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM
endif # CONSOLE_SERIAL
config SPKMODEM
bool "spkmodem (console on speaker) console output"

2
src/console/uart_console.c
View File

@ -43,7 +43,7 @@ static unsigned char uartmem_rx_byte(void)
/* This only relevant with x86 with GDB_STUB enabled.*/
static int uartmem_tst_byte(void)
{
#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
#if CONFIG_DRIVERS_UART_8250IO || CONFIG_DRIVERS_UART_8250MEM
return uart_can_rx_byte();
#else
return 0;

2
src/cpu/allwinner/a10/Kconfig
View File

@ -76,7 +76,7 @@ config SYS_SDRAM_BASE
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART0
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"

12
src/cpu/allwinner/a10/Makefile.inc
View File

@ -4,8 +4,6 @@ bootblock-y += gpio.c
bootblock-y += pinmux.c
bootblock-y += raminit.c
bootblock-y += timer.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart_console.c
romstage-y += bootblock_media.c
romstage-y += cbmem.c
@ -13,8 +11,6 @@ romstage-y += clock.c
romstage-y += pinmux.c
romstage-y += timer.c
romstage-y += twi.c
romstage-y += uart.c
romstage-y += uart_console.c
ramstage-y += bootblock_media.c
ramstage-y += cbmem.c
@ -23,8 +19,12 @@ ramstage-y += cpu.c
ramstage-y += monotonic_timer.c
ramstage-y += timer.c
ramstage-y += twi.c
ramstage-y += uart.c
ramstage-y += uart_console.c
ifeq ($(CONFIG_DRIVERS_UART),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c uart_console.c
romstage-y += uart.c uart_console.c
ramstage-y += uart.c uart_console.c
endif
real-target: $(obj)/BOOT0

4
src/cpu/samsung/exynos5250/Kconfig
View File

@ -91,7 +91,7 @@ config SYS_SDRAM_BASE
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
@ -117,7 +117,7 @@ endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2

6
src/cpu/samsung/exynos5250/Makefile.inc
View File

@ -9,7 +9,7 @@ bootblock-y += pinmux.c mct.c power.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y)
ifeq ($(CONFIG_DRIVERS_UART),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
bootblock-y += wakeup.c
@ -25,7 +25,7 @@ romstage-y += dmc_init_ddr3.c
romstage-y += power.c
romstage-y += mct.c
romstage-y += monotonic_timer.c
ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y)
ifeq ($(CONFIG_DRIVERS_UART),y)
romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
endif
romstage-y += wakeup.c
@ -40,7 +40,7 @@ ramstage-y += clock.c
ramstage-y += clock_init.c
ramstage-y += pinmux.c
ramstage-y += power.c
ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += cpu.c
ramstage-y += tmu.c
ramstage-y += mct.c

4
src/cpu/samsung/exynos5420/Kconfig
View File

@ -93,7 +93,7 @@ config SYS_SDRAM_BASE
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
@ -119,7 +119,7 @@ endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2

6
src/cpu/samsung/exynos5420/Makefile.inc
View File

@ -9,7 +9,7 @@ bootblock-y += pinmux.c mct.c power.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y)
ifeq ($(CONFIG_DRIVERS_UART),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
endif
bootblock-y += wakeup.c
@ -25,7 +25,7 @@ romstage-y += dmc_init_ddr3.c
romstage-y += power.c
romstage-y += mct.c
romstage-y += monotonic_timer.c
ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y)
ifeq ($(CONFIG_DRIVERS_UART),y)
romstage-$(CONFIG_EARLY_CONSOLE) += uart.c
endif
romstage-y += wakeup.c
@ -40,7 +40,7 @@ ramstage-y += clock.c
ramstage-y += clock_init.c
ramstage-y += pinmux.c
ramstage-y += power.c
ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c
ramstage-$(CONFIG_DRIVERS_UART) += uart.c
ramstage-y += cpu.c
ramstage-y += tmu.c
ramstage-y += mct.c

7
src/cpu/ti/am335x/Makefile.inc
View File

@ -1,16 +1,19 @@
bootblock-y += dmtimer.c
bootblock-y += bootblock_media.c
bootblock-y += pinmux.c
bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
romstage-y += nand.c
romstage-y += uart.c
ramstage-y += dmtimer.c
ramstage-y += monotonic_timer.c
ramstage-y += nand.c
ramstage-y += timer.c
ifeq ($(CONFIG_DRIVERS_UART),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
romstage-y += uart.c
ramstage-y += uart.c
endif
$(call add-class,omap-header)

10
src/cpu/x86/smm/smiutil.c
View File

@ -32,10 +32,7 @@ void console_tx_byte(unsigned char byte)
if (byte == '\n')
console_tx_byte('\r');
#if CONFIG_CONSOLE_SERIAL8250MEM
uart_tx_byte(byte);
#endif
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL
uart_tx_byte(byte);
#endif
}
@ -45,10 +42,7 @@ void console_init(void)
{
#if CONFIG_DEBUG_SMI
console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
#if CONFIG_CONSOLE_SERIAL8250
uart_init();
#endif
#if CONFIG_CONSOLE_SERIAL8250MEM
#if CONFIG_CONSOLE_SERIAL
uart_init();
#endif
#endif

2
src/drivers/Makefile.inc
View File

@ -30,7 +30,7 @@ subdirs-y += parade
subdirs-y += realtek
subdirs-y += sil
subdirs-y += trident
subdirs-y += uart
subdirs-$(CONFIG_DRIVERS_UART) += uart
subdirs-y += usb
subdirs-y += ics
subdirs-y += spi

2
src/drivers/oxford/oxpcie/Kconfig
View File

@ -1,7 +1,7 @@
config DRIVERS_OXFORD_OXPCIE
bool "Oxford OXPCIe952"
default n
select HAVE_UART_MEMORY_MAPPED
select DRIVERS_UART_8250MEM
help
Support for Oxford OXPCIe952 serial port PCIe cards.
Currently only devices with the vendor ID 0x1415 and device ID

2
src/drivers/oxford/oxpcie/Makefile.inc
View File

@ -1,4 +1,4 @@
ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y)
ifeq ($(CONFIG_CONSOLE_SERIAL),y)
ramstage-y += oxpcie_early.c oxpcie.c
romstage-y += oxpcie_early.c
endif

15
src/drivers/uart/Kconfig
View File

@ -1,10 +1,19 @@
# This should default to N and be set by SuperI/O drivers that have an UART
config HAVE_UART_IO_MAPPED
config DRIVERS_UART
bool
default y if CONSOLE_SERIAL
default n
config DRIVERS_UART_8250IO
bool "Serial port on SuperIO"
depends on !ARCH_ARMV7
default n if NO_UART_ON_SUPERIO
default y if ARCH_X86
config HAVE_UART_MEMORY_MAPPED
# Select this for mainboard without SuperIO serial port.
config NO_UART_ON_SUPERIO
def_bool n
config DRIVERS_UART_8250MEM
bool
default n

13
src/drivers/uart/Makefile.inc
View File

@ -1,28 +1,25 @@
ifeq ($(CONFIG_CONSOLE_SERIAL),y)
romstage-y += util.c
ramstage-y += util.c
bootblock-y += util.c
smm-$(CONFIG_DEBUG_SMI) += util.c
endif
ifeq ($(CONFIG_CONSOLE_SERIAL8250),y)
# Add the driver, only one can be enabled. The driver files may
# be located in the soc/ or cpu/ directories instead of here.
ifeq ($(CONFIG_DRIVERS_UART_8250IO),y)
romstage-y += uart8250io.c
ramstage-y += uart8250io.c
smm-$(CONFIG_DEBUG_SMI) += uart8250io.c
endif
ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y)
ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y)
romstage-y += uart8250mem.c
ramstage-y += uart8250mem.c
smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c
endif
ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y)
ifeq ($(CONFIG_DRIVERS_UART_PL011),y)
bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c
romstage-$(CONFIG_EARLY_CONSOLE) += pl011.c
ramstage-y += pl011.c
endif
endif

2
src/lib/coreboot_table.c
View File

@ -390,7 +390,7 @@ unsigned long write_coreboot_table(
lb_mainboard(head);
/* Record the serial ports and consoles */
#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART
#if CONFIG_CONSOLE_SERIAL
uart_fill_lb(head);
#endif
#if CONFIG_CONSOLE_USB

2
src/mainboard/emulation/qemu-armv7/Kconfig
View File

@ -50,7 +50,7 @@ config DRAM_SIZE_MB
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
default 0x10009000
# Memory map for qemu vexpress-a9:

4
src/mainboard/samsung/lumpy/romstage.c
View File

@ -40,7 +40,7 @@
#include <cpu/x86/msr.h>
#include "option_table.h"
#include "gpio.h"
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_DRIVERS_UART_8250IO
#include "superio/smsc/lpc47n207/lpc47n207.h"
#include "superio/smsc/lpc47n207/early_serial.c"
#endif
@ -53,7 +53,7 @@ static void pch_enable_lpc(void)
/* Set COM1/COM2 decode range */
pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010);
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_DRIVERS_UART_8250IO
/* Enable SuperIO + EC + KBC + COM1 + lpc47n207 config*/
pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN |
KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN);

4
src/mainboard/samsung/stumpy/romstage.c
View File

@ -40,7 +40,7 @@
#include <cpu/x86/bist.h>
#include <cpu/x86/msr.h>
#include "gpio.h"
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_DRIVERS_UART_8250IO
#include "superio/smsc/lpc47n207/lpc47n207.h"
#include "superio/smsc/lpc47n207/early_serial.c"
#endif
@ -62,7 +62,7 @@ static void pch_enable_lpc(void)
/* Set COM1/COM2 decode range */
pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010);
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_DRIVERS_UART_8250IO
/* Enable SuperIO + PS/2 Keyboard/Mouse + COM1 + lpc47n207 config*/
pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN |\
CNF2_LPC_EN | COMA_LPC_EN);

4
src/mainboard/ti/beaglebone/Kconfig
View File

@ -64,7 +64,7 @@ config CBFS_HEADER_ROM_OFFSET
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART0
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
config CONSOLE_SERIAL_UART0
bool "UART0"
@ -100,7 +100,7 @@ endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_UART
depends on CONSOLE_SERIAL
default 0x44e09000 if CONSOLE_SERIAL_UART0
default 0x48022000 if CONSOLE_SERIAL_UART1
default 0x48024000 if CONSOLE_SERIAL_UART2

2
src/superio/via/vt1211/vt1211.c
View File

@ -117,7 +117,7 @@ static void vt1211_pnp_set_resources(struct device *dev)
{
struct resource *res;
#if CONFIG_CONSOLE_SERIAL8250
#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO
/* TODO: Do the same for SP2? */
if (dev->path.pnp.device == VT1211_SP1) {
for (res = dev->resource_list; res; res = res->next) {