device/dram/ddr3: Get rid of useless typedefs

These typedefs are not necessary. Remove them, and rename some elements
to avoid any confusion with other DRAM generations, such as DDR4.

Change-Id: Ibe40f33372358262c540e371f7866b06a4ac842a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51895
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/device/dram/ddr3.c

@@ -98,7 +98,7 @@ u16 spd_ddr3_calc_unique_crc(u8 *spd, int len)
  *		SPD_STATUS_INVALID_FIELD -- A field with an invalid value was
  *					    detected.
  */
-int spd_decode_ddr3(dimm_attr * dimm, spd_raw_data spd)
+int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd)
 {
 	int ret;
 	u16 crc, spd_crc;
@@ -394,7 +394,7 @@ int spd_decode_ddr3(dimm_attr * dimm, spd_raw_data spd)
  *		SPD_STATUS_INVALID_FIELD -- A field with an invalid value was
  *					    detected.
  */
-int spd_xmp_decode_ddr3(dimm_attr *dimm,
+int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm,
 		       spd_raw_data spd,
 		       enum ddr3_xmp_profile profile)
 {
@@ -505,7 +505,7 @@ int spd_xmp_decode_ddr3(dimm_attr *dimm,
  */
 enum cb_err spd_add_smbios17(const u8 channel, const u8 slot,
 			     const u16 selected_freq,
-			     const dimm_attr *info)
+			     const struct dimm_attr_ddr3_st *info)
 {
 	struct memory_info *mem_info;
 	struct dimm_info *dimm;
@@ -597,7 +597,7 @@ static void print_ns(const char *msg, u32 val)
 *
 * @param dimm pointer to already decoded @ref dimm_attr structure
 */
-void dram_print_spd_ddr3(const dimm_attr * dimm)
+void dram_print_spd_ddr3(const struct dimm_attr_ddr3_st *dimm)
 {
 	u16 val16;
 	int i;

src/include/device/dram/ddr3.h

@@ -75,7 +75,7 @@ enum spd_dimm_type {
  *
  * Characteristic flags for the DIMM, as presented by the SPD
  */
-typedef union dimm_flags_st {
+union dimm_flags_ddr3_st {
 	/* The whole point of the union/struct construct is to allow us to clear
 	 * all the bits with one line: flags.raw = 0.
 	 * We do not care how these bits are ordered */
@@ -111,19 +111,19 @@ typedef union dimm_flags_st {
 		unsigned int therm_sensor:1;
 	};
 	unsigned int raw;
-} dimm_flags_t;
+};
 
 /**
  * \brief DIMM characteristics
  *
  * The characteristics of each DIMM, as presented by the SPD
  */
-typedef struct dimm_attr_st {
+struct dimm_attr_ddr3_st {
 	enum spd_memory_type dram_type;
 	enum spd_dimm_type dimm_type;
 	u16 cas_supported;
 	/* Flags extracted from SPD */
-	dimm_flags_t flags;
+	union dimm_flags_ddr3_st flags;
 	/* SDRAM width */
 	u8 width;
 	/* Number of ranks */
@@ -161,7 +161,7 @@ typedef struct dimm_attr_st {
 	u8 part_number[17];
 	/* Serial number */
 	u8 serial[SPD_DIMM_SERIAL_LEN];
-} dimm_attr;
+};
 
 enum ddr3_xmp_profile {
 	DDR3_XMP_PROFILE_1 = 0,
@@ -172,15 +172,15 @@ typedef u8 spd_raw_data[256];
 
 u16 spd_ddr3_calc_crc(u8 *spd, int len);
 u16 spd_ddr3_calc_unique_crc(u8 *spd, int len);
-int spd_decode_ddr3(dimm_attr *dimm, spd_raw_data spd_data);
+int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_raw_data spd_data);
 int spd_dimm_is_registered_ddr3(enum spd_dimm_type type);
-void dram_print_spd_ddr3(const dimm_attr *dimm);
+void dram_print_spd_ddr3(const struct dimm_attr_ddr3_st *dimm);
-int spd_xmp_decode_ddr3(dimm_attr *dimm,
+int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm,
 			spd_raw_data spd,
 			enum ddr3_xmp_profile profile);
 enum cb_err spd_add_smbios17(const u8 channel, const u8 slot,
 			     const u16 selected_freq,
-			     const dimm_attr *info);
+			     const struct dimm_attr_ddr3_st *info);
 /**
  * \brief Read double word from specified address
  *

src/northbridge/intel/sandybridge/raminit.c

@@ -174,7 +174,7 @@ static void dram_find_spds_ddr3(spd_raw_data *spd, ramctr_timing *ctrl)
 			spd_slot = 2 * channel + slot;
 			printk(BIOS_DEBUG, "SPD probe channel%d, slot%d\n", channel, slot);
 
-			dimm_attr *const dimm = &ctrl->info.dimm[channel][slot];
+			struct dimm_attr_ddr3_st *const dimm = &ctrl->info.dimm[channel][slot];
 
 			/* Search for XMP profile */
 			spd_xmp_decode_ddr3(dimm, spd[spd_slot],

src/northbridge/intel/sandybridge/raminit_common.c

@@ -66,7 +66,7 @@ void dram_find_common_params(ramctr_timing *ctrl)
 
 	FOR_ALL_CHANNELS for (slot = 0; slot < 2; slot++) {
 
-		const dimm_attr *dimm = &dimms->dimm[channel][slot];
+		const struct dimm_attr_ddr3_st *dimm = &dimms->dimm[channel][slot];
 		if (dimm->dram_type != SPD_MEMORY_TYPE_SDRAM_DDR3)
 			continue;
 
@@ -245,7 +245,7 @@ void dram_dimm_mapping(ramctr_timing *ctrl)
 	dimm_info *info = &ctrl->info;
 
 	FOR_ALL_CHANNELS {
-		dimm_attr *dimmA, *dimmB;
+		struct dimm_attr_ddr3_st *dimmA, *dimmB;
 		u32 reg = 0;
 
 		if (info->dimm[channel][0].size_mb >= info->dimm[channel][1].size_mb) {

src/northbridge/intel/sandybridge/raminit_common.h

@@ -322,7 +322,7 @@ typedef struct odtmap_st {
 
 /* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */
 typedef struct dimm_info_st {
-	dimm_attr dimm[NUM_CHANNELS][NUM_SLOTS];
+	struct dimm_attr_ddr3_st dimm[NUM_CHANNELS][NUM_SLOTS];
 } dimm_info;
 
 /* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */

src/northbridge/intel/x4x/raminit.c

@@ -351,7 +351,7 @@ static void workaround_stacked_mode(struct sysinfo *s)
 static int ddr3_save_dimminfo(u8 dimm_idx, u8 *raw_spd,
 		struct abs_timings *saved_timings, struct sysinfo *s)
 {
-	struct dimm_attr_st decoded_dimm;
+	struct dimm_attr_ddr3_st decoded_dimm;
 
 	if (spd_decode_ddr3(&decoded_dimm, raw_spd) != SPD_STATUS_OK)
 		return CB_ERR;

src/soc/intel/baytrail/romstage/raminit.c

@@ -55,7 +55,7 @@ static void ABI_X86 send_to_console(unsigned char b)
 
 static void populate_smbios_tables(void *dram_data, int speed, int num_channels)
 {
-	dimm_attr dimm;
+	struct dimm_attr_ddr3_st dimm;
 	enum spd_status status;
 
 	/* Decode into dimm_attr struct */