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amd/stoneyridge: Fix SPD files and functions camel case 

Remove ugly camel case in the soc/amd/common and Stoney Ridge
SPD files and functions. Update the related mainboards.

Also, remove a unreferenced function prototype, smbus_readSpd().

Change-Id: I51045b6621f0708d61a570acbdcb4e6522baa1ea
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22483
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marc Jones 2017-11-16 10:01:08 -07:00 committed by Marc Jones
parent da6b1bc9e2
commit afd03d8a28
8 changed files with 23 additions and 24 deletions
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2
src/mainboard/amd/gardenia/devicetree.cb
View File

@ -14,7 +14,7 @@
#
chip soc/amd/stoneyridge
register "spdAddrLookup" = "
register "spd_addr_lookup" = "
{
{ {0xA2, 0x00} }, // socket 0 - Channel 0, slots 0 & 1
}"

2
src/mainboard/google/kahlee/variants/kahlee/devicetree.cb
View File

@ -14,7 +14,7 @@
#
chip soc/amd/stoneyridge
register "spdAddrLookup" = "
register "spd_addr_lookup" = "
{
{ {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0
}"

5
src/soc/amd/common/dimmSpd.h → src/soc/amd/common/block/include/amdblocks/dimm_spd.h
View File

@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
* Copyright (C) 2012, 2017 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -20,7 +20,6 @@ AGESA_STATUS
AmdMemoryReadSPD(IN UINT32 Func, IN UINTN Data,
IN OUT AGESA_READ_SPD_PARAMS *SpdData);
int sb_readSpd(uint8_t spdAddress, char *buf, size_t len);
int smbus_readSpd(int spdAddress, char *buf, size_t len);
int sb_read_spd(uint8_t spdAddress, char *buf, size_t len);
#endif

2
src/soc/amd/stoneyridge/BiosCallOuts.c
View File

@ -21,7 +21,7 @@
#include <agesawrapper.h>
#include <amdlib.h>
#include <dimmSpd.h>
#include <amdblocks/dimm_spd.h>
AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
{

2
src/soc/amd/stoneyridge/Makefile.inc
View File

@ -47,7 +47,7 @@ bootblock-y += tsc_freq.c
romstage-y += BiosCallOuts.c
romstage-y += romstage.c
romstage-y += early_setup.c
romstage-y += dimmSpd.c
romstage-y += dimm_spd.c
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
romstage-y += gpio.c
romstage-$(CONFIG_STONEYRIDGE_IMC_FWM) += imc.c

2
src/soc/amd/stoneyridge/chip.h
View File

@ -25,7 +25,7 @@
#define MAX_DIMMS_PER_CH 2
struct soc_amd_stoneyridge_config {
u8 spdAddrLookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH];
u8 spd_addr_lookup[MAX_NODES][MAX_DRAM_CH][MAX_DIMMS_PER_CH];
enum {
DRAM_CONTENTS_KEEP,
DRAM_CONTENTS_CLEAR

18
src/soc/amd/stoneyridge/dimmSpd.c → src/soc/amd/stoneyridge/dimm_spd.c
View File

@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 - 2016 Advanced Micro Devices, Inc.
* Copyright (C) 2015 - 2017 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -19,28 +19,28 @@
#include <soc/pci_devs.h>
#include <stdlib.h>
#include "chip.h"
#include <dimmSpd.h>
#include <amdblocks/dimm_spd.h>
AGESA_STATUS AmdMemoryReadSPD(UINT32 unused1, UINTN unused2,
AGESA_READ_SPD_PARAMS *info)
{
uint8_t spdAddress;
uint8_t spd_address;
DEVTREE_CONST struct device *dev = dev_find_slot(0, DCT_DEVFN);
DEVTREE_CONST struct soc_amd_stoneyridge_config *conf = dev->chip_info;
if ((dev == 0) || (conf == 0))
return AGESA_ERROR;
if (info->SocketId >= ARRAY_SIZE(conf->spdAddrLookup))
if (info->SocketId >= ARRAY_SIZE(conf->spd_addr_lookup))
return AGESA_ERROR;
if (info->MemChannelId >= ARRAY_SIZE(conf->spdAddrLookup[0]))
if (info->MemChannelId >= ARRAY_SIZE(conf->spd_addr_lookup[0]))
return AGESA_ERROR;
if (info->DimmId >= ARRAY_SIZE(conf->spdAddrLookup[0][0]))
if (info->DimmId >= ARRAY_SIZE(conf->spd_addr_lookup[0][0]))
return AGESA_ERROR;
spdAddress = conf->spdAddrLookup
spd_address = conf->spd_addr_lookup
[info->SocketId][info->MemChannelId][info->DimmId];
if (spdAddress == 0)
if (spd_address == 0)
return AGESA_ERROR;
int err = sb_readSpd(spdAddress, (void *)info->Buffer, 128);
int err = sb_read_spd(spd_address, (void *)info->Buffer, 128);
if (err)
return AGESA_ERROR;
return AGESA_SUCCESS;

14
src/soc/amd/stoneyridge/smbus_spd.c
View File

@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
* Copyright (C) 2012, 2017 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -18,7 +18,7 @@
#include <device/device.h>
#include <soc/southbridge.h>
#include <soc/smbus.h>
#include <dimmSpd.h>
#include <amdblocks/dimm_spd.h>
/*
* readspd - Read one or more SPD bytes from a DIMM.
@ -72,24 +72,24 @@ static int readspd(uint16_t iobase, uint8_t SmbusSlaveAddress,
return 0;
}
static void writePmReg(int reg, int data)
static void write_pm_reg(int reg, int data)
{
outb(reg, PM_INDEX);
outb(data, PM_DATA);
}
static void setupFch(uint16_t ioBase)
static void setup_fch(uint16_t ioBase)
{
writePmReg(SMB_ASF_IO_BASE, ioBase >> 8);
write_pm_reg(SMB_ASF_IO_BASE, ioBase >> 8);
outb(SMB_SPEED_400KHZ, ioBase + SMBTIMING);
/* Clear all SMBUS status bits */
outb(SMBHST_STAT_CLEAR, ioBase + SMBHSTSTAT);
outb(SMBSLV_STAT_CLEAR, ioBase + SMBSLVSTAT);
}
int sb_readSpd(uint8_t spdAddress, char *buf, size_t len)
int sb_read_spd(uint8_t spdAddress, char *buf, size_t len)
{
uint16_t ioBase = SMB_BASE_ADDR;
setupFch(ioBase);
setup_fch(ioBase);
return readspd(ioBase, spdAddress, buf, len);
}