From afd687f71f629bbdf6c5bb25ac43e32079853a0c Mon Sep 17 00:00:00 2001 From: John Su Date: Tue, 26 Nov 2019 10:39:45 +0800 Subject: [PATCH] mb/google/drallion/variants/drallion: Adjust all I2C CLK to meet spec After adjustment on Drallion Touch Pad CLK: 393 KHz Touch Screen CLK: 381 KHz H1 CLK: 391 KHz BUG=b:144245601 BRANCH=master TEST=emerge-drallion coreboot chromeos-bootimage measure by scope with drallion. Change-Id: Id669d7199bc6ed4b55d7542f095c6c8baf00f984 Signed-off-by: John Su Reviewed-on: https://review.coreboot.org/c/coreboot/+/37230 Reviewed-by: Mathew King Tested-by: build bot (Jenkins) --- .../google/drallion/variants/drallion/devicetree.cb | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mainboard/google/drallion/variants/drallion/devicetree.cb b/src/mainboard/google/drallion/variants/drallion/devicetree.cb index 2fcf191eae..75fd3ee09b 100644 --- a/src/mainboard/google/drallion/variants/drallion/devicetree.cb +++ b/src/mainboard/google/drallion/variants/drallion/devicetree.cb @@ -176,20 +176,20 @@ chip soc/intel/cannonlake .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 52, - .fall_time_ns = 110, + .rise_time_ns = 180, + .fall_time_ns = 200, }, .i2c[1] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 52, - .fall_time_ns = 110, + .rise_time_ns = 30, + .fall_time_ns = 80, .data_hold_time_ns = 330, }, .i2c[4] = { .early_init = 1, .speed = I2C_SPEED_FAST, - .rise_time_ns = 36, - .fall_time_ns = 99, + .rise_time_ns = 30, + .fall_time_ns = 60, }, }"