mb/asrock/h110m: enable ACPI LDN in SuperIO
Change-Id: Icbfec4dc82a1fbbfeb49c3dbd047509f5873d235 Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35370 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
parent
7d549f8908
commit
afd7ce680b
|
@ -365,7 +365,13 @@ chip soc/intel/skylake
|
|||
device pnp 2e.109 off end # GPIO3
|
||||
device pnp 2e.209 off end # GPIO4
|
||||
device pnp 2e.309 off end # GPIO5
|
||||
device pnp 2e.a off end # ACPI
|
||||
device pnp 2e.a on
|
||||
# Power RAM in S3 and let the PCH
|
||||
# handle power failure actions
|
||||
irq 0xe4 = 0x70
|
||||
# Set HWM reset source to LRESET#
|
||||
irq 0xe7 = 0x01
|
||||
end # ACPI
|
||||
device pnp 2e.b on # HWM, LED
|
||||
io 0x60 = 0x0290
|
||||
io 0x62 = 0
|
||||
|
|
Loading…
Reference in New Issue