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commonlib: Add new TS for CSE firmware Sync 

The patch defines new TS for CSE firmware synchronization.
Also, removes unused TS_FIT_UCODE_LOADED TS.

TEST=Build the code for Brya

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I9ed82c5358eb94b5e7c91b9fd783c5e09189b77a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59668
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sridhar Siricilla 2021-11-26 11:03:36 +05:30 committed by Felix Held
parent 58ce8b7db0
commit aff2457723
1 changed files with 4 additions and 2 deletions
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6
src/commonlib/include/commonlib/timestamp_serialized.h
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@ -119,7 +119,8 @@ enum timestamp_id {
TS_ME_ICC_CONFIG_START = 945,
TS_ME_HOST_BOOT_PREP_DONE = 946,
TS_ME_RECEIVED_CRDA_FROM_PMC = 947,
TS_FIT_UCODE_LOADED = 948,
TS_START_CSE_FW_SYNC = 948,
TS_END_CSE_FW_SYNC = 949,
/* 950+ reserved for vendorcode extensions (950-999: intel/fsp) */
TS_FSP_MEMORY_INIT_START = 950,
@ -280,7 +281,8 @@ static const struct timestamp_id_to_name {
{ TS_ME_ICC_CONFIG_START, "CSE started to handle ICC configuration"},
{ TS_ME_HOST_BOOT_PREP_DONE, "CSE sent 'Host BIOS Prep Done' to PMC"},
{ TS_ME_RECEIVED_CRDA_FROM_PMC, "CSE received 'CPU Reset Done Ack sent' from PMC"},
{ TS_FIT_UCODE_LOADED, "CPU has loaded UCODE/PCODE from FIT"},
{ TS_START_CSE_FW_SYNC, "starting CSE firmware sync"},
{ TS_END_CSE_FW_SYNC, "finished CSE firmware sync"},
/* FSP related timestamps */
{ TS_FSP_MEMORY_INIT_START, "calling FspMemoryInit" },