soc/amd/mendocino: remove LIDS field from global NVS

Since the LIDS field is only used in the ACPI code and not in the C code
of any mainboard using the Mendocino SoC, remove it form the global NVS
and add an ACPI object for this in the DSDT of the mainboards that use
it in their ACPI code.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I1ed0407826f579eb14169246b7b14ba677c20e8d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72185
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2023-01-20 23:37:51 +01:00
parent 8b42a24d03
commit b01f74ae3e
3 changed files with 9 additions and 8 deletions

View File

@ -13,6 +13,9 @@ DefinitionBlock (
)
{
#include <acpi/dsdt_top.asl>
Name(LIDS, 0)
#include <soc.asl>
#if CONFIG(FEATURE_DYNAMIC_DPTC)
#include <variant/acpi/dtts.asl>

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@ -8,8 +8,7 @@
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */
LIDS, 8, // 0x00 - LID State
CBMC, 32, // 0x01 - 0x04 - coreboot Memory Console
PM1I, 64, // 0x05 - 0x0c - System Wake Source - PM1 Index
GPEI, 64, // 0x0d - 0x14 - GPE Wake Source
CBMC, 32, // 0x00 - 0x03 - coreboot Memory Console
PM1I, 64, // 0x04 - 0x0b - System Wake Source - PM1 Index
GPEI, 64, // 0x0c - 0x13 - GPE Wake Source
}

View File

@ -13,10 +13,9 @@
struct __packed global_nvs {
/* Miscellaneous */
uint8_t lids; /* 0x00 - LID State */
uint32_t cbmc; /* 0x01 - 0x04 - coreboot Memory Console */
uint64_t pm1i; /* 0x05 - 0x0c - System Wake Source - PM1 Index */
uint64_t gpei; /* 0x0d - 0x14 - GPE Wake Source */
uint32_t cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
uint64_t pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
uint64_t gpei; /* 0x0c - 0x13 - GPE Wake Source */
};
#endif /* AMD_MENDOCINO_NVS_H */