small step to clean up mainboard directories. debug.c was basically identical
on all amd64 motherboards, so it moved to the amdk8 specific code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
e52666931a
commit
b01fb94995
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@ -15,7 +15,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#define SIO_BASE 0x2e
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#define SIO_BASE 0x2e
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@ -15,7 +15,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#define SIO_BASE 0x2e
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#define SIO_BASE 0x2e
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@ -20,7 +20,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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@ -17,7 +17,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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@ -17,7 +17,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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@ -19,7 +19,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/NSC/pc87366/pc87366_early_serial.c"
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#include "superio/NSC/pc87366/pc87366_early_serial.c"
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@ -20,7 +20,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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#include "superio/NSC/pc87360/pc87360_early_serial.c"
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@ -14,7 +14,7 @@
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "lib/delay.c"
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#include "lib/delay.c"
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#include "cpu/p6/boot_cpu.c"
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#include "cpu/p6/boot_cpu.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "northbridge/amd/amdk8/reset_test.c"
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#include "debug.c"
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#include "northbridge/amd/amdk8/debug.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "northbridge/amd/amdk8/cpu_rev.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
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/*
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* generic K8 debug code, used by mainboard specific auto.c
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*
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*/
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static void print_debug_pci_dev(unsigned dev)
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{
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print_debug("PCI: ");
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print_debug_hex8((dev >> 16) & 0xff);
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print_debug_char(':');
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print_debug_hex8((dev >> 11) & 0x1f);
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print_debug_char('.');
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print_debug_hex8((dev >> 8) & 7);
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}
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static void print_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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print_debug_pci_dev(dev);
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print_debug("\r\n");
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}
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}
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static void dump_pci_device(unsigned dev)
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{
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int i;
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print_debug_pci_dev(dev);
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print_debug("\r\n");
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for(i = 0; i <= 255; i++) {
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unsigned char val;
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if ((i & 0x0f) == 0) {
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print_debug_hex8(i);
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print_debug_char(':');
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}
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val = pci_read_config8(dev, i);
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print_debug_char(' ');
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print_debug_hex8(val);
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if ((i & 0x0f) == 0x0f) {
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print_debug("\r\n");
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}
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}
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}
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static void dump_pci_devices(void)
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{
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device_t dev;
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for(dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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}
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}
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static void dump_spd_registers(const struct mem_controller *ctrl)
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{
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int i;
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print_debug("\r\n");
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for(i = 0; i < 4; i++) {
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unsigned device;
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device = ctrl->channel0[i];
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if (device) {
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int j;
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".0: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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device = ctrl->channel1[i];
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if (device) {
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int j;
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".1: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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}
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}
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static void dump_smbus_registers(void)
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{
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int i;
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print_debug("\r\n");
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for(i = 1; i < 0x80; i++) {
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unsigned device;
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device = i;
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int j;
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print_debug("smbus: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = smbus_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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}
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Loading…
Reference in New Issue