mb/google/brya: add list of gpios to lock
Add a list of gpios to lock for brya. This currently includes GPIOs connected to the FPMCU. BUG=b:201430600 TEST='emerge-brya coreboot chromeos-bootimage', flash and verify that brya0 boots successfully to kernel. Change-Id: Idea42a58575c280be0770d38f934acdf5508c45d Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -456,3 +456,21 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
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*num = 0;
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return NULL;
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}
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static struct gpio_lock_config lockable_brya_gpios[] = {
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{ GPP_B6, GPIO_LOCK_CONFIG }, /* PCH_I2C_TPM_SCL */
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{ GPP_B7, GPIO_LOCK_CONFIG }, /* PCH_I2C_TPM_SDA */
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{ GPP_A13, GPIO_LOCK_CONFIG }, /* GSC_PCH_INT_ODL */
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{ GPP_E15, GPIO_LOCK_CONFIG }, /* PCH_WP_OD */
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{ GPP_F11, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CLK_FPMCU_R */
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{ GPP_F13, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D1_FPMCU_D0 */
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{ GPP_F12, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D0_FPMCU_D1_R */
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{ GPP_F15, GPIO_LOCK_CONFIG }, /* FPMCU_INT_L */
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{ GPP_F16, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CS_FPMCU_R_L */
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};
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const struct gpio_lock_config *mb_gpio_lock_config(size_t *num)
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{
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*num = ARRAY_SIZE(lockable_brya_gpios);
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return lockable_brya_gpios;
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}
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