bd82x6x: Move calling of finalize() on resume to southbridge code

Change-Id: I6416cd5780fbda0b3c2e236ce98a9f9a508e70c6
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/10293
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
This commit is contained in:
Vladimir Serbinenko 2015-05-21 10:32:59 +02:00
parent 501cce8b18
commit b06a249c3b
17 changed files with 9 additions and 94 deletions

View File

@ -36,12 +36,6 @@
#include <device/pci.h>
#include <cbfs.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;

View File

@ -36,12 +36,6 @@
#include <device/pci.h>
#include <cbfs.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;

View File

@ -183,14 +183,6 @@ static void program_keyboard_type(u32 search_address, u32 search_length)
ec_mem_write(EC_KBID_REG, kbd_type);
}
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
u32 search_address = 0x0;

View File

@ -54,12 +54,6 @@ void mainboard_post(u8 value)
*/
}
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
#if CONFIG_VGA_ROM_RUN
static int int15_handler(void)
{

View File

@ -39,15 +39,11 @@
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
/* Enable ACPI mode before OS resume */
outb(0xe1, 0xb2);
}
static void mainboard_init(device_t dev)
{
/* Initialize the Embedded Controller */

View File

@ -39,9 +39,6 @@
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
/* Stout EC needs to be put back in ACPI mode */
ec_write_cmd(EC_CMD_NOTIFY_ACPI_ENTER);
}

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@ -33,14 +33,6 @@
#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
// mainboard_enable is executed as first thing after
// enumerate_buses().

View File

@ -35,12 +35,6 @@
#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
#if CONFIG_VGA_ROM_RUN
static int int15_handler(void)
{

View File

@ -33,12 +33,6 @@
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
/* init spi */

View File

@ -33,12 +33,6 @@
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
/* init spi */

View File

@ -38,12 +38,6 @@
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;

View File

@ -38,12 +38,6 @@
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;

View File

@ -33,12 +33,6 @@
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;

View File

@ -34,12 +34,6 @@
#include <pc80/keyboard.h>
#include <ec/lenovo/h8/h8.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
static void mainboard_init(device_t dev)
{
RCBA32(0x38c8) = 0x00002005;

View File

@ -38,9 +38,6 @@
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
/* Enable EC ACPI mode for the OS before resume */
send_ec_command(EC_SMI_DISABLE);
send_ec_command(EC_ACPI_ENABLE);

View File

@ -33,14 +33,6 @@
#include <boot/coreboot_tables.h>
#include <southbridge/intel/bd82x6x/pch.h>
void mainboard_suspend_resume(void)
{
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
// mainboard_enable is executed as first thing after
// enumerate_buses().

View File

@ -805,6 +805,14 @@ static void southbridge_fill_ssdt(void)
intel_acpi_pcie_hotplug_generator(chip->pcie_hotplug_map, 8);
}
static void lpc_final(struct device *dev)
{
if (CONFIG_HAVE_SMI_HANDLER && acpi_is_wakeup_s3()) {
/* Call SMM finalize() handlers before resume */
outb(0xcb, 0xb2);
}
}
static struct pci_operations pci_ops = {
.set_subsystem = set_subsystem,
};
@ -817,6 +825,7 @@ static struct device_operations device_ops = {
.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
.acpi_fill_ssdt_generator = southbridge_fill_ssdt,
.init = lpc_init,
.final = lpc_final,
.enable = pch_lpc_enable,
.scan_bus = scan_static_bus,
.ops_pci = &pci_ops,